Menu
▾
▴
[Linuxconsole-commit]CVS: ruby/linux/drivers/video tx3912fb.c,NONE,1.1 tx3912fb.h,NONE,1.1 fbmem.c,1.53,1.54
|
From: Paul M. <le...@us...> - 2001-11-13 02:09:22
|
Update of /cvsroot/linuxconsole/ruby/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv28890
Modified Files:
fbmem.c
Added Files:
tx3912fb.c tx3912fb.h
Log Message:
Added tx3912fb driver port by Dean Scott.
--- NEW FILE: tx3912fb.c ---
/*
* linux/drivers/video/tx3912fb.c
*
* Copyright (C) 1999 Harald Koerfgen
* Copyright (C) 2001 Steven Hill (sj...@re...)
* Copyright (C) 2001 Dean Scott (de...@th...)
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*
* Framebuffer for LCD controller in TMPR3912/05 and PR31700 processors
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/fb.h>
#include <asm/bootinfo.h>
#include <asm/uaccess.h>
#include <linux/config.h>
#include "tx3912fb.h"
/*
* Frame buffer, palette and console structures
*/
static struct fb_info fb_info;
static u32 pseudo_palette[17];
static struct fb_fix_screeninfo tx3912fb_fix __initdata = {
TX3912FB_NAME, (unsigned long) NULL, 0, FB_TYPE_PACKED_PIXELS, 0,
FB_VISUAL_TRUECOLOR, 0, 1, 1, 1, (unsigned long) NULL, 0, FB_ACCEL_NONE
};
static int tx3912fb_setcolreg(u_int regno, u_int red, u_int green,
u_int blue, u_int transp,
struct fb_info *info)
{
if (regno > 255)
return 1;
red >>= 8;
green >>= 8;
blue >>= 8;
switch (info->var.bits_per_pixel) {
case 8:
red &= 0xe000;
green &= 0xe000;
blue &= 0xc000;
((u8 *)(info->pseudo_palette))[regno] =
(red >> 8) |
(green >> 11) |
(blue >> 14);
break;
}
return 0;
}
/*
* Frame buffer operations structure used by console driver
*/
static struct fb_ops tx3912fb_ops = {
owner: THIS_MODULE,
fb_setcolreg: tx3912fb_setcolreg,
fb_fillrect: cfb_fillrect,
fb_copyarea: cfb_copyarea,
fb_imageblit: cfb_imageblit,
};
/*
* Initialization of the framebuffer
*/
int __init tx3912fb_init(void)
{
/* Stop the video logic when frame completes */
VidCtrl1 |= ENFREEZEFRAME;
IntClear1 |= INT1_LCDINT;
while (!(IntStatus1 & INT1_LCDINT));
/* Disable the video logic */
VidCtrl1 &= ~(ENVID | DISPON);
udelay(200);
/* Set start address for DMA transfer */
VidCtrl3 = tx3912fb_paddr &
(TX3912_VIDCTRL3_VIDBANK_MASK |
TX3912_VIDCTRL3_VIDBASEHI_MASK);
/* Set end address for DMA transfer */
VidCtrl4 = (tx3912fb_paddr + tx3912fb_size + 1) &
TX3912_VIDCTRL4_VIDBASELO_MASK;
/* Set the pixel depth */
switch (tx3912fb_info.bits_per_pixel) {
case 1:
/* Monochrome */
VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK;
tx3912fb_fix.visual = FB_VISUAL_MONO10;
break;
case 4:
/* 4-bit gray */
VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK;
VidCtrl1 |= TX3912_VIDCTRL1_4BIT_GRAY;
tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
break;
case 8:
/* 8-bit color */
VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK;
VidCtrl1 |= TX3912_VIDCTRL1_8BIT_COLOR;
tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
break;
case 2:
default:
/* 2-bit gray */
VidCtrl1 &= ~TX3912_VIDCTRL1_BITSEL_MASK;
VidCtrl1 |= TX3912_VIDCTRL1_2BIT_GRAY;
tx3912fb_fix.visual = FB_VISUAL_PSEUDOCOLOR;
break;
}
/* Unfreeze video logic and enable DF toggle */
VidCtrl1 &= ~(ENFREEZEFRAME | DFMODE);
udelay(200);
/* Clear the framebuffer */
memset((void *) tx3912fb_vaddr, 0xff, tx3912fb_size);
udelay(200);
/* Enable the video logic */
VidCtrl1 |= (DISPON | ENVID);
tx3912fb_fix.smem_start = tx3912fb_vaddr;
tx3912fb_fix.smem_len = tx3912fb_size;
fb_info.node = -1;
fb_info.fbops = &tx3912fb_ops;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.var = tx3912fb_info;
fb_info.fix = tx3912fb_fix;
fb_info.pseudo_palette = pseudo_palette;
if (register_framebuffer(&fb_info) < 0)
return -EINVAL;
return 0;
}
static void __exit tx3912fb_exit(void)
{
unregister_framebuffer(&fb_info);
}
#ifdef MODULE
module_init(tx3912fb_init);
module_exit(tx3912fb_exit);
MODULE_LICENSE("GPL");
#endif
--- NEW FILE: tx3912fb.h ---
/*
* linux/drivers/video/tx3912fb.h
*
* Copyright (C) 2001 Steven Hill (sj...@re...)
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive for
* more details.
*
* Includes for TMPR3912/05 and PR31700 LCD controller registers
*/
#include <asm/tx3912.h>
#define VidCtrl1 REG_AT(0x028)
#define VidCtrl2 REG_AT(0x02C)
#define VidCtrl3 REG_AT(0x030)
#define VidCtrl4 REG_AT(0x034)
#define VidCtrl5 REG_AT(0x038)
#define VidCtrl6 REG_AT(0x03C)
#define VidCtrl7 REG_AT(0x040)
#define VidCtrl8 REG_AT(0x044)
#define VidCtrl9 REG_AT(0x048)
#define VidCtrl10 REG_AT(0x04C)
#define VidCtrl11 REG_AT(0x050)
#define VidCtrl12 REG_AT(0x054)
#define VidCtrl13 REG_AT(0x058)
#define VidCtrl14 REG_AT(0x05C)
/* Video Control 1 Register */
#define LINECNT 0xffc00000
#define LINECNT_SHIFT 22
#define LOADDLY BIT(21)
#define BAUDVAL (BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
#define BAUDVAL_SHIFT 16
#define VIDDONEVAL (BIT(15) | BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9))
#define VIDDONEVAL_SHIFT 9
#define ENFREEZEFRAME BIT(8)
#define TX3912_VIDCTRL1_BITSEL_MASK 0x000000c0
#define TX3912_VIDCTRL1_2BIT_GRAY 0x00000040
#define TX3912_VIDCTRL1_4BIT_GRAY 0x00000080
#define TX3912_VIDCTRL1_8BIT_COLOR 0x000000c0
#define BITSEL_SHIFT 6
#define DISPSPLIT BIT(5)
#define DISP8 BIT(4)
#define DFMODE BIT(3)
#define INVVID BIT(2)
#define DISPON BIT(1)
#define ENVID BIT(0)
/* Video Control 2 Register */
#define VIDRATE_MASK 0xffc00000
#define VIDRATE_SHIFT 22
#define HORZVAL_MASK 0x001ff000
#define HORZVAL_SHIFT 12
#define LINEVAL_MASK 0x000001ff
/* Video Control 3 Register */
#define TX3912_VIDCTRL3_VIDBANK_MASK 0xfff00000
#define TX3912_VIDCTRL3_VIDBASEHI_MASK 0x000ffff0
/* Video Control 4 Register */
#define TX3912_VIDCTRL4_VIDBASELO_MASK 0x000ffff0
/*
* Begin platform specific configurations
*/
#if defined(CONFIG_NINO_4MB) || defined(CONFIG_NINO_8MB)
#define FB_X_RES 240
#define FB_Y_RES 320
#if defined(CONFIG_FBCON_CFB4)
#define FB_BPP 4
#else
#if defined(CONFIG_FBCON_CFB2)
#define FB_BPP 2
#else
#define FB_BPP 1
#endif
#endif
#define FB_IS_GREY 1
#define FB_IS_INVERSE 0
#endif
#ifdef CONFIG_NINO_16MB
#define FB_X_RES 240
#define FB_Y_RES 320
#define FB_BPP 8
#define FB_IS_GREY 0
#define FB_IS_INVERSE 0
#endif
/*
* Define virtual resolutions if necessary
*/
#ifndef FB_X_VIRTUAL_RES
#define FB_X_VIRTUAL_RES FB_X_RES
#endif
#ifndef FB_Y_VIRTUAL_RES
#define FB_Y_VIRTUAL_RES FB_Y_RES
#endif
/*
* Framebuffer address and size
*/
u_long tx3912fb_paddr = 0;
u_long tx3912fb_vaddr = 0;
u_long tx3912fb_size = (FB_X_RES * FB_Y_RES * FB_BPP / 8);
/*
* Framebuffer info structure
*/
static struct fb_var_screeninfo tx3912fb_info = {
FB_X_RES, FB_Y_RES,
FB_X_VIRTUAL_RES, FB_Y_VIRTUAL_RES,
0, 0,
FB_BPP, FB_IS_GREY,
{0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0},
0, FB_ACTIVATE_NOW,
-1, -1, 0, 20000,
64, 64, 32, 32, 64, 2,
0, FB_VMODE_NONINTERLACED,
{0,0,0,0,0,0}
};
/*
* Framebuffer name
*/
static char TX3912FB_NAME[16] = "tx3912fb";
Index: fbmem.c
===================================================================
RCS file: /cvsroot/linuxconsole/ruby/linux/drivers/video/fbmem.c,v
retrieving revision 1.53
retrieving revision 1.54
diff -u -d -r1.53 -r1.54
--- fbmem.c 2001/10/10 16:31:16 1.53
+++ fbmem.c 2001/11/13 02:09:18 1.54
@@ -128,6 +128,7 @@
extern int sisfb_setup(char*);
extern int stifb_init(void);
extern int stifb_setup(char*);
+extern int tx3912fb_init(void);
extern int radeonfb_init(void);
extern int radeonfb_setup(char*);
extern int sstfb_init(void);
@@ -318,6 +319,9 @@
#endif
#ifdef CONFIG_FB_VR4181
{ "vr4181fb", vr4181fb_init, NULL },
+#endif
+#ifdef CONFIG_FB_TX3912
+ { "tx3912", tx3912fb_init, NULL },
#endif
/*
|
