[LV-k25-commit] kernel-2.5/include/asm-vax system.h,1.17,1.18

[Jan-Benedict G. <jb...@us...>]

Update of /cvsroot/linux-vax/kernel-2.5/include/asm-vax
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv20768/include/asm-vax

Modified Files:
	system.h 
Log Message:
- Fix some whitespace; though, more fixes are needed.


Index: system.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.5/include/asm-vax/system.h,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- system.h	31 Jul 2005 14:55:37 -0000	1.17
+++ system.h	31 Jul 2005 15:02:35 -0000	1.18
@@ -19,14 +19,14 @@
  */
 
 /* FIXME: these are wrong */
-#define KERNEL_START	(PAGE_OFFSET+0x300000)
-#define SWAPPER_PGD	(PAGE_OFFSET+0x300000)
-#define INIT_STACK	(PAGE_OFFSET+0x302000)
-#define EMPTY_PGT	(PAGE_OFFSET+0x304000)
-#define EMPTY_PGE	(PAGE_OFFSET+0x308000)
-#define ZERO_PGE	(PAGE_OFFSET+0x30A000)
+#define KERNEL_START		(PAGE_OFFSET + 0x300000)
+#define SWAPPER_PGD		(PAGE_OFFSET + 0x300000)
+#define INIT_STACK		(PAGE_OFFSET + 0x302000)
+#define EMPTY_PGT		(PAGE_OFFSET + 0x304000)
+#define EMPTY_PGE		(PAGE_OFFSET + 0x308000)
+#define ZERO_PGE		(PAGE_OFFSET + 0x30A000)
 
-#define START_ADDR	(PAGE_OFFSET+0x310000)
+#define START_ADDR		(PAGE_OFFSET + 0x310000)
 
 #define arch_align_stack(x)	(x)
 
@@ -82,16 +82,19 @@
 #define setipl(ipl) __mtpr(ipl, PR_IPL)
 
 /* SMP: non atomic alert */
-#define swpipl(ipl)                                             \
-({                                                              \
-    register unsigned long __r0; 		             	\
-    __asm__ __volatile__(                                   	\
-	   "mfpr $0x12, %0\n"					\
-           "mtpr %1, $0x12 #swpipl"                    		\
-	   :"=&r" (__r0)		      			\
-	   :"r" (ipl)						\
-	   : "r10", "memory");   				\
-        __r0;                                                   \
+/* FIXME: Use PR_IPL instead of 0x12 */
+#define swpipl(ipl)						\
+({								\
+	register unsigned long __r0;				\
+								\
+	__asm__ __volatile__(					\
+		"	mfpr	$0x12, %0		\n"	\
+		"	mtpr	%1, $0x12 #swpipl	\n"	\
+		: "=&r" (__r0)					\
+		: "r" (ipl)					\
+		: "r10", "memory");				\
+								\
+        __r0;							\
 })
 
 #define local_save_flags(flags)		((flags) = getipl())
@@ -99,11 +102,11 @@
 #define local_irq_restore(flags)	setipl(flags)
 #define local_irq_disable()		setipl(31)
 
-#define irqs_disabled() (__psl.ipl == 31)
- 
+#define irqs_disabled()			(__psl.ipl == 31)
+
 /* If we're handling an interrupt (i.e. the IS bit is set in the
    PSL and we're on the interrupt stack), then we must not enable
-   interrupts by dropping IPL all the way to 0.  If we do, and 
+   interrupts by dropping IPL all the way to 0.  If we do, and
    another interrupt comes in, then this second interrupt will
    be handled normally, but will REI to a PSL with IS set and
    an IPL of 0, which REI doesn't like at all.
@@ -122,7 +125,7 @@
 }
 
 #ifdef __SMP__
-#error SMP not supported
+#  error "SMP not supported"
 #endif /* __SMP__ */
 
 #define nop() __asm__ __volatile__ ("nop")
@@ -135,7 +138,7 @@
 
 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
 {
-   	unsigned int fred;
+	unsigned int fred;
 
 	switch (size) {
 		case 1:
@@ -155,8 +158,8 @@
 		case 4:
 			__asm__("movl %2,%0\n\t"
                                 "movl %1,%2"
-                                : "=&r" (fred) 
-                                : "r" (x), "m" (*__xg(ptr)) 
+                                : "=&r" (fred)
+                                : "r" (x), "m" (*__xg(ptr))
                                 : "memory");
 			break;
 	}