[LV-k25-commit] kernel-2.5/arch/vax/kernel time.c,1.16,1.17

[Jan-Benedict G. <jb...@us...>]

Update of /cvsroot/linux-vax/kernel-2.5/arch/vax/kernel
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19755

Modified Files:
	time.c 
Log Message:
- Always load the NICR.


Index: time.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.5/arch/vax/kernel/time.c,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- time.c	30 Sep 2004 09:12:16 -0000	1.16
+++ time.c	30 Sep 2004 20:50:50 -0000	1.17
@@ -61,9 +61,19 @@
 
 	if (request_irq(0x30, do_timer_interrupt, 0, "timer", NULL)) {
 		printk("Panic: unable to register timer interrupt handler\n");
-		asm("halt");
+		HALT;
 	}
 
+	/*
+	 * Some VAX CPUs are hardwired to trigger interrupts at 100Hz,
+	 * so we need to pay attention to HZ always being 100 for
+	 * compatibility reasons. For all other machines, we need to
+	 * supply a value (initial counter--an interrupt is triggered upon
+	 * overflow while this value is incremented at a 1µs interval)
+	 * to get more than one interrupt per hour:-)
+	 */
+	__mtpr (0xffffffff - 1000000/HZ, PR_NICR);
+
 	/* Set the clock ticking and enable clock interrupts */
 	__mtpr(ICCS_ERROR | ICCS_INTERRUPT |	/* clear error and interrupt bits */
 			ICCS_TRANSFER |		/* Load ICR from NICR */
@@ -155,8 +165,7 @@
 	 */
 	write_seqlock(&xtime_lock);
 
-        iccs = __mfpr(PR_ICCS);
-
+	iccs = __mfpr(PR_ICCS);
 	if (iccs & ICCS_ERROR) {
 		printk("Clock overrun\n");
 	}
@@ -168,29 +177,30 @@
 	 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
 	 * called as close as possible to 500 ms before the new second starts.
 	 */
-	if ((time_status & STA_UNSYNC) == 0 &&
-	    xtime.tv_sec > last_rtc_update + 660 &&
-	    (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
-	    (xtime.tv_nsec / 1000 ) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
+	if ((time_status & STA_UNSYNC) == 0
+			&& xtime.tv_sec > last_rtc_update + 660
+			&& (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2
+			&& (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
 		if (set_rtc_mmss(xtime.tv_sec) == 0)
 			last_rtc_update = xtime.tv_sec;
 		else
 			last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
 	}
-   
-	/* The ARM says we should do this in the clock ISR.  It isn't
-	   actually required on the KA650, as the ICCS register is
-	   not fully implemented.  But I don't know about the other
-	   CPU's yet */
 
+	/*
+	 * The VARM says we should do this in the clock ISR.  It isn't
+	 * actually required on the KA650, as the ICCS register is
+	 * not fully implemented.  But I don't know about the other
+	 * CPUs yet
+	 */
 	__mtpr(ICCS_INTERRUPT |    /* Clear interrupt bit */
 		ICCS_ERROR |       /* Clear error bit */
 		ICCS_TRANSFER |    /* Reload ICR from NICR */
 		ICCS_RUN,          /* ... and go again */
 		PR_ICCS);
-         
+
 	write_sequnlock(&xtime_lock);
-   
+
 	return IRQ_HANDLED;
 }