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[LV-kern-commit] CVS: kernel-2.4/arch/sparc64/mm extable.c,1.2,1.3 init.c,1.2,1.3 modutil.c,1.2,1.3 ultra.S,1.2,1.3
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From: Dave A. <ai...@us...> - 2003-06-10 01:14:54
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Update of /cvsroot/linux-vax/kernel-2.4/arch/sparc64/mm
In directory sc8-pr-cvs1:/tmp/cvs-serv7538/arch/sparc64/mm
Modified Files:
extable.c init.c modutil.c ultra.S
Log Message:
DA: sync with Marcelo 2.4.17
Index: extable.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/sparc64/mm/extable.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- extable.c 10 Apr 2002 15:21:24 -0000 1.2
+++ extable.c 10 Jun 2003 01:13:19 -0000 1.3
@@ -11,35 +11,49 @@
static unsigned long
search_one_table(const struct exception_table_entry *start,
- const struct exception_table_entry *last,
+ const struct exception_table_entry *end,
unsigned long value, unsigned long *g2)
{
- const struct exception_table_entry *first = start;
- const struct exception_table_entry *mid;
- long diff = 0;
- while (first <= last) {
- mid = (last - first) / 2 + first;
- diff = mid->insn - value;
- if (diff == 0) {
- if (!mid->fixup) {
- *g2 = 0;
- return (mid + 1)->fixup;
- } else
- return mid->fixup;
- } else if (diff < 0)
- first = mid+1;
- else
- last = mid-1;
- }
- if (last->insn < value && !last->fixup && last[1].insn > value) {
- *g2 = (value - last->insn)/4;
- return last[1].fixup;
- }
- if (first > start && first[-1].insn < value
- && !first[-1].fixup && first->insn < value) {
- *g2 = (value - first[-1].insn)/4;
- return first->fixup;
- }
+ const struct exception_table_entry *walk;
+
+ /* Single insn entries are encoded as:
+ * word 1: insn address
+ * word 2: fixup code address
+ *
+ * Range entries are encoded as:
+ * word 1: first insn address
+ * word 2: 0
+ * word 3: last insn address + 4 bytes
+ * word 4: fixup code address
+ *
+ * See asm/uaccess.h for more details.
+ */
+
+ /* 1. Try to find an exact match. */
+ for (walk = start; walk <= end; walk++) {
+ if (walk->fixup == 0) {
+ /* A range entry, skip both parts. */
+ walk++;
+ continue;
+ }
+
+ if (walk->insn == value)
+ return walk->fixup;
+ }
+
+ /* 2. Try to find a range match. */
+ for (walk = start; walk <= (end - 1); walk++) {
+ if (walk->fixup)
+ continue;
+
+ if (walk[0].insn <= value &&
+ walk[1].insn > value) {
+ *g2 = (value - walk[0].insn) / 4;
+ return walk[1].fixup;
+ }
+ walk++;
+ }
+
return 0;
}
Index: init.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/sparc64/mm/init.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- init.c 10 Apr 2002 15:21:24 -0000 1.2
+++ init.c 10 Jun 2003 01:13:20 -0000 1.3
@@ -63,6 +63,8 @@
struct page *mem_map_zero;
+int bigkernel = 0;
+
int do_check_pgt_cache(int low, int high)
{
int freed = 0;
@@ -111,7 +113,7 @@
extern void __update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
-#ifdef DCFLUSH_DEBUG
+#ifdef CONFIG_DEBUG_DCFLUSH
atomic_t dcpage_flushes = ATOMIC_INIT(0);
#ifdef CONFIG_SMP
atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
@@ -120,7 +122,7 @@
__inline__ void flush_dcache_page_impl(struct page *page)
{
-#ifdef DCFLUSH_DEBUG
+#ifdef CONFIG_DEBUG_DCFLUSH
atomic_inc(&dcpage_flushes);
#endif
@@ -152,7 +154,7 @@
"casx [%2], %%g7, %%g5\n\t"
"cmp %%g7, %%g5\n\t"
"bne,pn %%xcc, 1b\n\t"
- " nop"
+ " membar #StoreLoad | #StoreStore"
: /* no outputs */
: "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
: "g5", "g7");
@@ -172,7 +174,7 @@
"casx [%2], %%g7, %%g5\n\t"
"cmp %%g7, %%g5\n\t"
"bne,pn %%xcc, 1b\n\t"
- " nop\n"
+ " membar #StoreLoad | #StoreStore\n"
"2:"
: /* no outputs */
: "r" (cpu), "r" (mask), "r" (&page->flags)
@@ -261,14 +263,14 @@
else
seq_printf(m, "MMU Type\t: ???\n");
-#ifdef DCFLUSH_DEBUG
+#ifdef CONFIG_DEBUG_DCFLUSH
seq_printf(m, "DCPageFlushes\t: %d\n",
atomic_read(&dcpage_flushes));
#ifdef CONFIG_SMP
seq_printf(m, "DCPageFlushesXC\t: %d\n",
atomic_read(&dcpage_flushes_xcall));
#endif /* CONFIG_SMP */
-#endif /* DCFLUSH_DEBUG */
+#endif /* CONFIG_DEBUG_DCFLUSH */
}
struct linux_prom_translation {
@@ -505,6 +507,10 @@
(unsigned long) KERNBASE,
prom_get_mmu_ihandle());
+ if (bigkernel)
+ remap_func(((tte_data + 0x400000) & _PAGE_PADDR),
+ (unsigned long) KERNBASE + 0x400000, prom_get_mmu_ihandle());
+
/* Flush out that temporary mapping. */
spitfire_flush_dtlb_nucleus_page(0x0);
spitfire_flush_itlb_nucleus_page(0x0);
@@ -512,6 +518,12 @@
/* Now lock us back into the TLBs via OBP. */
prom_dtlb_load(sparc64_highest_locked_tlbent(), tte_data, tte_vaddr);
prom_itlb_load(sparc64_highest_locked_tlbent(), tte_data, tte_vaddr);
+ if (bigkernel) {
+ prom_dtlb_load(sparc64_highest_locked_tlbent()-1, tte_data + 0x400000,
+ tte_vaddr + 0x400000);
+ prom_itlb_load(sparc64_highest_locked_tlbent()-1, tte_data + 0x400000,
+ tte_vaddr + 0x400000);
+ }
/* Re-read translations property. */
if ((n = prom_getproperty(node, "translations", (char *)trans, tsz)) == -1) {
@@ -528,6 +540,8 @@
unsigned long avoid_start = (unsigned long) KERNBASE;
unsigned long avoid_end = avoid_start + (4 * 1024 * 1024);
+ if (bigkernel)
+ avoid_end += (4 * 1024 * 1024);
if (vaddr < avoid_start) {
unsigned long top = vaddr + size;
@@ -714,7 +728,8 @@
}
}
if (tlb_type == spitfire) {
- for (i = 0; i < SPITFIRE_HIGHEST_LOCKED_TLBENT; i++) {
+ int high = SPITFIRE_HIGHEST_LOCKED_TLBENT - bigkernel;
+ for (i = 0; i < high; i++) {
unsigned long data;
/* Spitfire Errata #32 workaround */
@@ -752,7 +767,7 @@
}
}
- for (i = 0; i < SPITFIRE_HIGHEST_LOCKED_TLBENT; i++) {
+ for (i = 0; i < high; i++) {
unsigned long data;
/* Spitfire Errata #32 workaround */
@@ -790,7 +805,9 @@
}
}
} else if (tlb_type == cheetah) {
- for (i = 0; i < CHEETAH_HIGHEST_LOCKED_TLBENT; i++) {
+ int high = CHEETAH_HIGHEST_LOCKED_TLBENT - bigkernel;
+
+ for (i = 0; i < high; i++) {
unsigned long data;
data = cheetah_get_ldtlb_data(i);
@@ -814,7 +831,7 @@
}
}
- for (i = 0; i < CHEETAH_HIGHEST_LOCKED_TLBENT; i++) {
+ for (i = 0; i < high; i++) {
unsigned long data;
data = cheetah_get_litlb_data(i);
@@ -1282,6 +1299,8 @@
set_bit(0, mmu_context_bmap);
real_end = (unsigned long)&_end;
+ if ((real_end > ((unsigned long)KERNBASE + 0x400000)))
+ bigkernel = 1;
#ifdef CONFIG_BLK_DEV_INITRD
if (sparc_ramdisk_image)
real_end = (PAGE_ALIGN(real_end) + PAGE_ALIGN(sparc_ramdisk_size));
Index: modutil.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/sparc64/mm/modutil.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- modutil.c 10 Apr 2002 15:21:24 -0000 1.2
+++ modutil.c 10 Jun 2003 01:13:20 -0000 1.3
@@ -11,10 +11,6 @@
#include <asm/uaccess.h>
#include <asm/system.h>
-#define MODULES_VADDR 0x0000000001000000ULL /* Where to map modules */
-#define MODULES_LEN 0x000000007f000000ULL
-#define MODULES_END 0x0000000080000000ULL
-
static struct vm_struct * modvmlist = NULL;
void module_unmap (void * addr)
Index: ultra.S
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/sparc64/mm/ultra.S,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- ultra.S 10 Apr 2002 15:21:24 -0000 1.2
+++ ultra.S 10 Jun 2003 01:13:20 -0000 1.3
@@ -117,7 +117,7 @@
wrpr %g1, PSTATE_IE, %pstate
mov TLB_TAG_ACCESS, %g3
/* XXX Spitfire dependency... */
- mov (62 << 3), %g2
+ mov ((SPITFIRE_HIGHEST_LOCKED_TLBENT-1) << 3), %g2
/* Spitfire Errata #32 workaround. */
mov 0x8, %o4
@@ -642,7 +642,7 @@
stx %g0, [%g4 + %lo(errata32_hwbug)]
2: add %g2, 1, %g2
- cmp %g2, 63
+ cmp %g2, SPITFIRE_HIGHEST_LOCKED_TLBENT
ble,pt %icc, 1b
sll %g2, 3, %g3
flush %g6
@@ -679,20 +679,15 @@
.globl xcall_call_function
xcall_call_function:
- mov TLB_TAG_ACCESS, %g5 ! wheee...
- stxa %g1, [%g5] ASI_IMMU ! save call_data here for a bit
- membar #Sync
rdpr %pstate, %g2
wrpr %g2, PSTATE_IG | PSTATE_AG, %pstate
- mov TLB_TAG_ACCESS, %g2
- ldxa [%g2] ASI_IMMU, %g5
rdpr %pil, %g2
wrpr %g0, 15, %pil
sethi %hi(109f), %g7
b,pt %xcc, etrap_irq
109: or %g7, %lo(109b), %g7
call smp_call_function_client
- mov %l5, %o0
+ nop
b,pt %xcc, rtrap
clr %l6
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