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[LV-k25-commit] CVS: kernel-2.5/arch/vax/boot cpu_sel.c,NONE,1.1 head.S,1.3,1.4 cpu_sel.S,1.5,NONE
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From: Kenn H. <ke...@us...> - 2002-05-28 20:29:36
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Update of /cvsroot/linux-vax/kernel-2.5/arch/vax/boot
In directory usw-pr-cvs1:/tmp/cvs-serv11595
Modified Files:
head.S
Added Files:
cpu_sel.c
Removed Files:
cpu_sel.S
Log Message:
Re-implement CPU type identification in C
--- NEW FILE ---
/*
Boot-time CPU identification - required virtual memory to be
turned off (MAPEN=0).
$Id: cpu_sel.c,v 1.1 2002/05/28 20:29:28 kenn Exp $
*/
#include <asm/mtpr.h> /* Processor register definitions */
#include <asm/mv.h> /* machine vector definitions */
#include <asm/system.h> /* for HALT */
#include <asm/vaxcpu.h> /* CPU type definitions */
extern struct vax_mv mv_ka410;
extern struct vax_mv mv_ka630;
extern struct vax_mv mv_ka640;
extern struct vax_mv mv_ka650;
extern struct vax_mv mv_ka660;
extern struct vax_mv mv_ka42;
extern struct vax_mv mv_ka43;
extern struct vax_mv mv_ka46;
extern struct vax_mv mv_ka55;
extern struct vax_mv mv_vxt;
struct vax_mv *idcpu_uvax2(unsigned int sid)
{
unsigned int subtype;
/* Extract subtype from SID */
subtype = (sid & UVAX2_SID_SUBTYPE_MASK) >> UVAX2_SID_SUBTYPE_SHIFT;
switch (subtype) {
case UVAX2_SID_SUBTYPE_KA630:
case UVAX2_SID_SUBTYPE_CHARON:
return &mv_ka630;
case UVAX2_SID_SUBTYPE_KA410:
return &mv_ka410;
default:
/* Unsupported MicroVAX II CPU - Type E/I PR$_SID
at console to get SID value and report to
lin...@mi... */
HALT;
}
return NULL;
}
struct vax_mv *idcpu_cvax_qbus(unsigned int sidex)
{
unsigned int subtype;
subtype = (sidex & CVAX_Q22_SUBTYPE_MASK) >> CVAX_Q22_SUBTYPE_SHIFT;
/* There are 3 different Q22 CVAX implementations, we only support
the KA650 and KA655 at the moment. The KA640 should be fairly
similar, since all three have the same firmware. */
switch (subtype) {
case CVAX_Q22_SUBTYPE_KA650:
case CVAX_Q22_SUBTYPE_KA655:
return &mv_ka650;
case CVAX_Q22_SUBTYPE_KA640:
return &mv_ka640;
default:
/* Unsupported QBUS CVAX CPU - Type E/P/L 20040004
at console to get SIDEX value and report to
lin...@mi... */
HALT;
}
return NULL;
}
struct vax_mv *idcpu_cvax_vs3100(unsigned int sidex)
{
/* We don't know how to interpret the SIDEX in this case, but the
only CPU we know of that will match this far is the KA42 (as
used in VS3100/m38) */
return &mv_ka42;
}
struct vax_mv *idcpu_cvax(void)
{
unsigned int sidex;
unsigned int type;
sidex = *(long *)CVAX_SIDEX_ADDR;
type = (sidex & CVAX_SIDEX_TYPE_MASK) >> CVAX_SIDEX_TYPE_SHIFT;
switch (type) {
case CVAX_SIDEX_TYPE_Q22:
return idcpu_cvax_qbus(sidex);
case CVAX_SIDEX_TYPE_VS3100:
return idcpu_cvax_vs3100(sidex);
default:
/* Unsupported CVAX CPU - Type E/P/L 20040004 at
console to get SIDEX value and report to
lin...@mi... */
HALT;
}
return NULL;
}
struct vax_mv *idcpu_soc_qbus(unsigned int sidex)
{
unsigned int subtype;
subtype = (sidex & SOC_Q22_SUBTYPE_MASK) >> SOC_Q22_SUBTYPE_SHIFT;
switch (subtype) {
case SOC_Q22_SUBTYPE_KA660:
return &mv_ka660;
default:
/* Unsupported QBUS SOC CPU - Type E/P/L 20040004
at console to get SIDEX value and report to
lin...@mi... */
HALT;
}
return NULL;
}
struct vax_mv *idcpu_soc(void)
{
unsigned int sidex;
unsigned int type;
sidex = *(long *)SOC_SIDEX_ADDR;
type = (sidex & SOC_SIDEX_TYPE_MASK) >> SOC_SIDEX_TYPE_SHIFT;
switch (type) {
case SOC_SIDEX_TYPE_Q22:
return idcpu_soc_qbus(sidex);
case SOC_SIDEX_TYPE_VXT:
return &mv_vxt;
default:
/* Unsupported SOC CPU - Type E/P/L 20040004 at
console to get SIDEX value and report to
lin...@mi... */
HALT;
}
return NULL;
}
struct vax_mv *idcpu_rigel()
{
/* We don't know how to interpret the SIDEX in this case, but the
only CPU we know of that will match this far is the KA43 (as
used in VS3100/m76) */
return &mv_ka43;
}
struct vax_mv *idcpu_mariah()
{
/* We don't know how to interpret the SIDEX in this case, but the
only CPU we know of that will match this far is the KA46 (as
used in VS4000/m60) */
return &mv_ka46;
}
struct vax_mv *idcpu_nvax()
{
/* We don't know how to interpret the SIDEX in this case, but the
only CPU we know of that will match this far is the KA55 (as
used in MicroVAX 3100m85) */
return &mv_ka55;
}
struct vax_mv *idcpu(void)
{
unsigned int sid;
unsigned int family;
/* First get SID processor register. VARM says all CPUs must
implement this */
sid = __mfpr(PR_SID);
/* Cpu family is high byte of SID, remainder is family-specific */
family = (sid & VAX_SID_FAMILY_MASK) >> VAX_SID_FAMILY_SHIFT;
switch (family) {
case VAX_CVAX:
return idcpu_cvax();
case VAX_RIGEL:
return idcpu_rigel();
case VAX_MARIAH:
return idcpu_mariah();
case VAX_NVAX:
return idcpu_nvax();
case VAX_SOC:
return idcpu_soc();
case VAX_UVAX2:
return idcpu_uvax2(sid);
case VAX_780:
case VAX_750:
case VAX_730:
case VAX_8600:
case VAX_UVAX1:
default:
/* Unsupported CPU family - Type E/I PR$_SID at
console to get SID register value and report to
lin...@mi... */
HALT;
}
return NULL;
}
Index: head.S
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.5/arch/vax/boot/head.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -r1.3 -r1.4
--- head.S 20 May 2002 00:33:33 -0000 1.3
+++ head.S 28 May 2002 20:29:28 -0000 1.4
@@ -43,7 +43,8 @@
# movzbl $0x42,r2
# jsb 0x20040058
- jsb identify_cpu
+ calls $0, idcpu
+ movl r0, mv
# now fix up the machine vector entries. (They currently contain
# pointers to virtual addresses in S0 space. We need to change
@@ -61,13 +62,9 @@
subl2 $PAGE_OFFSET, MV_PRE_VM_INIT(r2)
# print the cpu type
- jsb crlf
- movab msg_cpu_type, r10
- jsb printstr
- jsb crlf
- moval kernel_cmd_line, r10
- movl (r10),r10
- jsb printint
+ jsb crlf
+ movab msg_cpu_type, r10
+ jsb printstr
movl mv, r10
calls $0, *MV_CPU_TYPE_STR(r10)
--- cpu_sel.S DELETED ---
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