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[LV-kern-commit] CVS: kernel-2.4/arch/ppc/8xx_io micropatch.c,NONE,1.1 Config.in,1.1.1.1,1.2 Makefile,1.1.1.1,1.2 commproc.c,1.1.1.1,1.2 enet.c,1.1.1.2,1.2 fec.c,1.1.1.2,1.2 uart.c,1.1.1.2,1.2 commproc.h,1.1.1.2,NONE
Update of /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io
In directory usw-pr-cvs1:/tmp/cvs-serv25860/ppc/8xx_io
Modified Files:
Config.in Makefile commproc.c enet.c fec.c uart.c
Added Files:
micropatch.c
Removed Files:
commproc.h
Log Message:
synch 2.4.15 commit 43
--- NEW FILE ---
/* Microcode patches for the CPM as supplied by Motorola.
* This is the one for IIC/SPI. There is a newer one that
* also relocates SMC2, but this would require additional changes
* to uart.c, so I am holding off on that for a moment.
*/
#include <linux/config.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/mpc8xx.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
#include <asm/commproc.h>
/* Define this to get SMC patches as well. You need to modify the uart
* driver as well......
#define USE_SMC_PATCH 1
*/
#ifdef CONFIG_USB_MPC8xx
#define USE_USB_SOF_PATCH
#endif
#ifdef USE_IIC_PATCH
#define PATCH_DEFINED
/* IIC/SPI */
uint patch_2000[] = {
0x7FFFEFD9,
0x3FFD0000,
0x7FFB49F7,
0x7FF90000,
0x5FEFADF7,
0x5F89ADF7,
0x5FEFAFF7,
0x5F89AFF7,
0x3A9CFBC8,
0xE7C0EDF0,
0x77C1E1BB,
0xF4DC7F1D,
0xABAD932F,
0x4E08FDCF,
0x6E0FAFF8,
0x7CCF76CF,
0xFD1FF9CF,
0xABF88DC6,
0xAB5679F7,
0xB0937383,
0xDFCE79F7,
0xB091E6BB,
0xE5BBE74F,
0xB3FA6F0F,
0x6FFB76CE,
0xEE0DF9CF,
0x2BFBEFEF,
0xCFEEF9CF,
0x76CEAD24,
0x90B2DF9A,
0x7FDDD0BF,
0x4BF847FD,
0x7CCF76CE,
0xCFEF7E1F,
0x7F1D7DFD,
0xF0B6EF71,
0x7FC177C1,
0xFBC86079,
0xE722FBC8,
0x5FFFDFFF,
0x5FB2FFFB,
0xFBC8F3C8,
0x94A67F01,
0x7F1D5F39,
0xAFE85F5E,
0xFFDFDF96,
0xCB9FAF7D,
0x5FC1AFED,
0x8C1C5FC1,
0xAFDD5FC3,
0xDF9A7EFD,
0xB0B25FB2,
0xFFFEABAD,
0x5FB2FFFE,
0x5FCE600B,
0xE6BB600B,
0x5FCEDFC6,
0x27FBEFDF,
0x5FC8CFDE,
0x3A9CE7C0,
0xEDF0F3C8,
0x7F0154CD,
0x7F1D2D3D,
0x363A7570,
0x7E0AF1CE,
0x37EF2E68,
0x7FEE10EC,
0xADF8EFDE,
0xCFEAE52F,
0x7D0FE12B,
0xF1CE5F65,
0x7E0A4DF8,
0xCFEA5F72,
0x7D0BEFEE,
0xCFEA5F74,
0xE522EFDE,
0x5F74CFDA,
0x0B627385,
0xDF627E0A,
0x30D8145B,
0xBFFFF3C8,
0x5FFFDFFF,
0xA7F85F5E,
0xBFFE7F7D,
0x10D31450,
0x5F36BFFF,
0xAF785F5E,
0xBFFDA7F8,
0x5F36BFFE,
0x77FD30C0,
0x4E08FDCF,
0xE5FF6E0F,
0xAFF87E1F,
0x7E0FFD1F,
0xF1CF5F1B,
0xABF80D5E,
0x5F5EFFEF,
0x79F730A2,
0xAFDD5F34,
0x47F85F34,
0xAFED7FDD,
0x50B24978,
0x47FD7F1D,
0x7DFD70AD,
0xEF717EC1,
0x6BA47F01,
0x2D267EFD,
0x30DE5F5E,
0xFFFD5F5E,
0xFFEF5F5E,
0xFFDF0CA0,
0xAFED0A9E,
0xAFDD0C3A,
0x5F3AAFBD,
0x7FBDB082,
0x5F8247F8
};
uint patch_2f00[] = {
0x3E303430,
0x34343737,
0xABF7BF9B,
0x994B4FBD,
0xBD599493,
0x349FFF37,
0xFB9B177D,
0xD9936956,
0xBBFDD697,
0xBDD2FD11,
0x31DB9BB3,
0x63139637,
0x93733693,
0x193137F7,
0x331737AF,
0x7BB9B999,
0xBB197957,
0x7FDFD3D5,
0x73B773F7,
0x37933B99,
0x1D115316,
0x99315315,
0x31694BF4,
0xFBDBD359,
0x31497353,
0x76956D69,
0x7B9D9693,
0x13131979,
0x79376935
};
#endif
#ifdef USE_SMC_PATCH
#define PATCH_DEFINED
/* SMC2/IIC/SPI Patch */
/* This is the area from 0x2000 to 0x23ff.
*/
uint patch_2000[] = {
0x3fff0000,
0x3ffd0000,
0x3ffb0000,
0x3ff90000,
0x5f13eff8,
0x5eb5eff8,
0x5f88adf7,
0x5fefadf7,
0x3a9cfbc8,
0x77cae1bb,
0xf4de7fad,
0xabae9330,
0x4e08fdcf,
0x6e0faff8,
0x7ccf76cf,
0xfdaff9cf,
0xabf88dc8,
0xab5879f7,
0xb0925d8d,
0xdfd079f7,
0xb090e6bb,
0xe5bbe74f,
0x9e046f0f,
0x6ffb76ce,
0xee0cf9cf,
0x2bfbefef,
0xcfeef9cf,
0x76cead23,
0x90b3df99,
0x7fddd0c1,
0x4bf847fd,
0x7ccf76ce,
0xcfef77ca,
0x7eaf7fad,
0x7dfdf0b7,
0xef7a7fca,
0x77cafbc8,
0x6079e722,
0xfbc85fff,
0xdfff5fb3,
0xfffbfbc8,
0xf3c894a5,
0xe7c9edf9,
0x7f9a7fad,
0x5f36afe8,
0x5f5bffdf,
0xdf95cb9e,
0xaf7d5fc3,
0xafed8c1b,
0x5fc3afdd,
0x5fc5df99,
0x7efdb0b3,
0x5fb3fffe,
0xabae5fb3,
0xfffe5fd0,
0x600be6bb,
0x600b5fd0,
0xdfc827fb,
0xefdf5fca,
0xcfde3a9c,
0xe7c9edf9,
0xf3c87f9e,
0x54ca7fed,
0x2d3a3637,
0x756f7e9a,
0xf1ce37ef,
0x2e677fee,
0x10ebadf8,
0xefdecfea,
0xe52f7d9f,
0xe12bf1ce,
0x5f647e9a,
0x4df8cfea,
0x5f717d9b,
0xefeecfea,
0x5f73e522,
0xefde5f73,
0xcfda0b61,
0x5d8fdf61,
0xe7c9edf9,
0x7e9a30d5,
0x1458bfff,
0xf3c85fff,
0xdfffa7f8,
0x5f5bbffe,
0x7f7d10d0,
0x144d5f33,
0xbfffaf78,
0x5f5bbffd,
0xa7f85f33,
0xbffe77fd,
0x30bd4e08,
0xfdcfe5ff,
0x6e0faff8,
0x7eef7e9f,
0xfdeff1cf,
0x5f17abf8,
0x0d5b5f5b,
0xffef79f7,
0x309eafdd,
0x5f3147f8,
0x5f31afed,
0x7fdd50af,
0x497847fd,
0x7f9e7fed,
0x7dfd70a9,
0xef7e7ece,
0x6ba07f9e,
0x2d227efd,
0x30db5f5b,
0xfffd5f5b,
0xffef5f5b,
0xffdf0c9c,
0xafed0a9a,
0xafdd0c37,
0x5f37afbd,
0x7fbdb081,
0x5f8147f8,
0x3a11e710,
0xedf0ccdd,
0xf3186d0a,
0x7f0e5f06,
0x7fedbb38,
0x3afe7468,
0x7fedf4fc,
0x8ffbb951,
0xb85f77fd,
0xb0df5ddd,
0xdefe7fed,
0x90e1e74d,
0x6f0dcbf7,
0xe7decfed,
0xcb74cfed,
0xcfeddf6d,
0x91714f74,
0x5dd2deef,
0x9e04e7df,
0xefbb6ffb,
0xe7ef7f0e,
0x9e097fed,
0xebdbeffa,
0xeb54affb,
0x7fea90d7,
0x7e0cf0c3,
0xbffff318,
0x5fffdfff,
0xac59efea,
0x7fce1ee5,
0xe2ff5ee1,
0xaffbe2ff,
0x5ee3affb,
0xf9cc7d0f,
0xaef8770f,
0x7d0fb0c6,
0xeffbbfff,
0xcfef5ede,
0x7d0fbfff,
0x5ede4cf8,
0x7fddd0bf,
0x49f847fd,
0x7efdf0bb,
0x7fedfffd,
0x7dfdf0b7,
0xef7e7e1e,
0x5ede7f0e,
0x3a11e710,
0xedf0ccab,
0xfb18ad2e,
0x1ea9bbb8,
0x74283b7e,
0x73c2e4bb,
0x2ada4fb8,
0xdc21e4bb,
0xb2a1ffbf,
0x5e2c43f8,
0xfc87e1bb,
0xe74ffd91,
0x6f0f4fe8,
0xc7ba32e2,
0xf396efeb,
0x600b4f78,
0xe5bb760b,
0x53acaef8,
0x4ef88b0e,
0xcfef9e09,
0xabf8751f,
0xefef5bac,
0x741f4fe8,
0x751e760d,
0x7fdbf081,
0x741cafce,
0xefcc7fce,
0x751e70ac,
0x741ce7bb,
0x3372cfed,
0xafdbefeb,
0xe5bb760b,
0x53f2aef8,
0xafe8e7eb,
0x4bf8771e,
0x7e247fed,
0x4fcbe2cc,
0x7fbc30a9,
0x7b0f7a0f,
0x34d577fd,
0x308b5db7,
0xde553e5f,
0xaf78741f,
0x741f30f0,
0xcfef5e2c,
0x741f3eac,
0xafb8771e,
0x5e677fed,
0x0bd3e2cc,
0x741ccfec,
0xe5ca53cd,
0x6fcb4f74,
0x5dadde4b,
0x2ab63d38,
0x4bb3de30,
0x751f741c,
0x6c42effa,
0xefea7fce,
0x6ffc30be,
0xefec3fca,
0x30b3de2e,
0xadf85d9e,
0xaf7daefd,
0x5d9ede2e,
0x5d9eafdd,
0x761f10ac,
0x1da07efd,
0x30adfffe,
0x4908fb18,
0x5fffdfff,
0xafbb709b,
0x4ef85e67,
0xadf814ad,
0x7a0f70ad,
0xcfef50ad,
0x7a0fde30,
0x5da0afed,
0x3c12780f,
0xefef780f,
0xefef790f,
0xa7f85e0f,
0xffef790f,
0xefef790f,
0x14adde2e,
0x5d9eadfd,
0x5e2dfffb,
0xe79addfd,
0xeff96079,
0x607ae79a,
0xddfceff9,
0x60795dff,
0x607acfef,
0xefefefdf,
0xefbfef7f,
0xeeffedff,
0xebffe7ff,
0xafefafdf,
0xafbfaf7f,
0xaeffadff,
0xabffa7ff,
0x6fef6fdf,
0x6fbf6f7f,
0x6eff6dff,
0x6bff67ff,
0x2fef2fdf,
0x2fbf2f7f,
0x2eff2dff,
0x2bff27ff,
0x4e08fd1f,
0xe5ff6e0f,
0xaff87eef,
0x7e0ffdef,
0xf11f6079,
0xabf8f542,
0x7e0af11c,
0x37cfae3a,
0x7fec90be,
0xadf8efdc,
0xcfeae52f,
0x7d0fe12b,
0xf11c6079,
0x7e0a4df8,
0xcfea5dc4,
0x7d0befec,
0xcfea5dc6,
0xe522efdc,
0x5dc6cfda,
0x4e08fd1f,
0x6e0faff8,
0x7c1f761f,
0xfdeff91f,
0x6079abf8,
0x761cee24,
0xf91f2bfb,
0xefefcfec,
0xf91f6079,
0x761c27fb,
0xefdf5da7,
0xcfdc7fdd,
0xd09c4bf8,
0x47fd7c1f,
0x761ccfcf,
0x7eef7fed,
0x7dfdf093,
0xef7e7f1e,
0x771efb18,
0x6079e722,
0xe6bbe5bb,
0xae0ae5bb,
0x600bae85,
0xe2bbe2bb,
0xe2bbe2bb,
0xaf02e2bb,
0xe2bb2ff9,
0x6079e2bb
};
/* This is from 0x2f00 to 0x2fff
*/
uint patch_2f00[] = {
0x30303030,
0x3e3e3434,
0xabbf9b99,
0x4b4fbdbd,
0x59949334,
0x9fff37fb,
0x9b177dd9,
0x936956bb,
0xfbdd697b,
0xdd2fd113,
0x1db9f7bb,
0x36313963,
0x79373369,
0x3193137f,
0x7331737a,
0xf7bb9b99,
0x9bb19795,
0x77fdfd3d,
0x573b773f,
0x737933f7,
0xb991d115,
0x31699315,
0x31531694,
0xbf4fbdbd,
0x35931497,
0x35376956,
0xbd697b9d,
0x96931313,
0x19797937,
0x6935af78,
0xb9b3baa3,
0xb8788683,
0x368f78f7,
0x87778733,
0x3ffffb3b,
0x8e8f78b8,
0x1d118e13,
0xf3ff3f8b,
0x6bd8e173,
0xd1366856,
0x68d1687b,
0x3daf78b8,
0x3a3a3f87,
0x8f81378f,
0xf876f887,
0x77fd8778,
0x737de8d6,
0xbbf8bfff,
0xd8df87f7,
0xfd876f7b,
0x8bfff8bd,
0x8683387d,
0xb873d87b,
0x3b8fd7f8,
0xf7338883,
0xbb8ee1f8,
0xef837377,
0x3337b836,
0x817d11f8,
0x7378b878,
0xd3368b7d,
0xed731b7d,
0x833731f3,
0xf22f3f23
};
uint patch_2e00[] = {
/* This is from 0x2e00 to 0x2e3c
*/
0x27eeeeee,
0xeeeeeeee,
0xeeeeeeee,
0xeeeeeeee,
0xee4bf4fb,
0xdbd259bb,
0x1979577f,
0xdfd2d573,
0xb773f737,
0x4b4fbdbd,
0x25b9b177,
0xd2d17376,
0x956bbfdd,
0x697bdd2f,
0xff9f79ff,
0xff9ff22f
};
#endif
#ifdef USE_USB_SOF_PATCH
#define PATCH_DEFINED
uint patch_2000[] = {
0x7fff0000,
0x7ffd0000,
0x7ffb0000,
0x49f7ba5b,
0xba383ffb,
0xf9b8b46d,
0xe5ab4e07,
0xaf77bffe,
0x3f7bbf79,
0xba5bba38,
0xe7676076,
0x60750000
};
uint patch_2f00[] = {
0x3030304c,
0xcab9e441,
0xa1aaf220
};
#endif
/* Load the microcode patch. This is called early in the CPM initialization
* with the controller in the reset state. We enable the processor after
* we load the patch.
*/
void
cpm_load_patch(volatile immap_t *immr)
{
#ifdef PATCH_DEFINED
volatile uint *dp;
volatile cpm8xx_t *commproc;
volatile iic_t *iip;
volatile spi_t *spp;
int i;
commproc = (cpm8xx_t *)&immr->im_cpm;
/* We work closely with commproc.c. We know it only allocates
* from data only space.
* For this particular patch, we only use the bottom 512 bytes
* and the upper 256 byte extension. We will use the space
* starting at 1K for the relocated parameters, as the general
* CPM allocation won't come from that area.
*/
commproc->cp_rccr = 0;
/* Copy the patch into DPRAM.
*/
dp = (uint *)(commproc->cp_dpmem);
for (i=0; i<(sizeof(patch_2000)/4); i++)
*dp++ = patch_2000[i];
dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
for (i=0; i<(sizeof(patch_2f00)/4); i++)
*dp++ = patch_2f00[i];
#ifdef USE_USB_SOF_PATCH
#if 0 /* usb patch should not relocate iic */
iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
#define RPBASE 0x0030
iip->iic_rpbase = RPBASE;
/* Put SPI above the IIC, also 32-byte aligned.
*/
i = (RPBASE + sizeof(iic_t) + 31) & ~31;
spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
spp->spi_rpbase = i;
#endif
/* Enable uCode fetches from DPRAM. */
commproc->cp_rccr = 0x0009;
printk("USB uCode patch installed\n");
#endif /* USE_USB_SOF_PATCH */
#if defined(USE_SMC_PATCH) || defined(USE_IIC_PATCH)
iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
#define RPBASE 0x0400
iip->iic_rpbase = RPBASE;
/* Put SPI above the IIC, also 32-byte aligned.
*/
i = (RPBASE + sizeof(iic_t) + 31) & ~31;
spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
spp->spi_rpbase = i;
#ifdef USE_SMC_PATCH
dp = (uint *)&(commproc->cp_dpmem[0x0e00]);
for (i=0; i<(sizeof(patch_2e00)/4); i++)
*dp++ = patch_2e00[i];
/* Enable the traps to get to it.
*/
commproc->cp_cpmcr1 = 0x8080;
commproc->cp_cpmcr2 = 0x808a;
commproc->cp_cpmcr3 = 0x8028;
commproc->cp_cpmcr4 = 0x802a;
/* Enable uCode fetches from DPRAM.
*/
commproc->cp_rccr = 3;
#endif
#ifdef USE_IIC_PATCH
/* Enable the traps to get to it.
*/
commproc->cp_cpmcr1 = 0x802a;
commproc->cp_cpmcr2 = 0x8028;
commproc->cp_cpmcr3 = 0x802e;
commproc->cp_cpmcr4 = 0x802c;
/* Enable uCode fetches from DPRAM.
*/
commproc->cp_rccr = 1;
printk("I2C uCode patch installed\n");
#endif
/* Relocate the IIC and SPI parameter areas. These have to
* aligned on 32-byte boundaries.
*/
iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
iip->iic_rpbase = RPBASE;
/* Put SPI above the IIC, also 32-byte aligned.
*/
i = (RPBASE + sizeof(iic_t) + 31) & ~31;
spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
spp->spi_rpbase = i;
#endif /* USE_SMC_PATCH || USE_IIC_PATCH */
#endif /* PATCH_DEFINED */
}
void
verify_patch(volatile immap_t *immr)
{
#ifdef PATCH_DEFINED
volatile uint *dp;
volatile cpm8xx_t *commproc;
int i;
commproc = (cpm8xx_t *)&immr->im_cpm;
printk("cp_rccr %x\n", commproc->cp_rccr);
commproc->cp_rccr = 0;
dp = (uint *)(commproc->cp_dpmem);
for (i=0; i<(sizeof(patch_2000)/4); i++)
if (*dp++ != patch_2000[i]) {
printk("patch_2000 bad at %d\n", i);
dp--;
printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]);
break;
}
dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
for (i=0; i<(sizeof(patch_2f00)/4); i++)
if (*dp++ != patch_2f00[i]) {
printk("patch_2f00 bad at %d\n", i);
dp--;
printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]);
break;
}
commproc->cp_rccr = 0x0009;
#endif /* PATCH_DEFINED */
}
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/Config.in,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- Config.in 14 Jan 2001 19:32:23 -0000 1.1.1.1
+++ Config.in 10 Apr 2002 15:03:56 -0000 1.2
@@ -7,23 +7,23 @@
if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
bool 'CPM SCC Ethernet' CONFIG_SCC_ENET
if [ "$CONFIG_SCC_ENET" = "y" ]; then
- bool 'Ethernet on SCC1' CONFIG_SCC1_ENET
- if [ "$CONFIG_SCC1_ENET" != "y" ]; then
- bool 'Ethernet on SCC2' CONFIG_SCC2_ENET
- fi
+ choice 'SCC used for Ethernet' \
+ "SCC1 CONFIG_SCC1_ENET \
+ SCC2 CONFIG_SCC2_ENET \
+ SCC3 CONFIG_SCC3_ENET" SCC1
fi
bool '860T FEC Ethernet' CONFIG_FEC_ENET
+ if [ "$CONFIG_FEC_ENET" = "y" ]; then
+ bool 'Use MDIO for PHY configuration' CONFIG_USE_MDIO
+ fi
bool 'Use Big CPM Ethernet Buffers' CONFIG_ENET_BIG_BUFFERS
fi
-bool 'Use SMC2 for UART' CONFIG_8xxSMC2
-if [ "$CONFIG_8xxSMC2" = "y" ]; then
- bool 'Use Alternate SMC2 I/O (823/850)' CONFIG_8xx_ALTSMC2
-fi
-bool 'Enable SCC2 and SCC3 for UART' CONFIG_8xxSCC
-
-if [ "$CONFIG_TQM860" = "y" -o "$CONFIG_TQM860L" = "y" -o "$CONFIG_TQM8xxL" = "y" ]; then
- bool 'Use SMC2 for Console' TQM_SMC2_CONSOLE
+bool 'Use SMC2 for UART' CONFIG_SMC2_UART
+if [ "$CONFIG_SMC2_UART" = "y" ]; then
+ bool 'Use Alternate SMC2 I/O (823/850)' CONFIG_ALTSMC2
+ bool 'Use SMC2 for Console' CONFIG_CONS_SMC2
fi
+bool 'Enable SCC2 and SCC3 for UART' CONFIG_USE_SCC_IO
# This doesn't really belong here, but it is convenient to ask
# 8xx specific questions.
@@ -31,5 +31,6 @@
comment 'Generic MPC8xx Options'
bool 'Copy-Back Data Cache (else Writethrough)' CONFIG_8xx_COPYBACK
bool 'CPU6 Silicon Errata (860 Pre Rev. C)' CONFIG_8xx_CPU6
+bool 'I2C/SPI Microcode Patch' CONFIG_UCODE_PATCH
endmenu
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/Makefile,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- Makefile 14 Jan 2001 19:31:58 -0000 1.1.1.1
+++ Makefile 10 Apr 2002 15:03:56 -0000 1.2
@@ -1,3 +1,5 @@
+# BK Id: SCCS/s.Makefile 1.6 08/30/01 09:33:48 trini
+#
#
# Makefile for the linux MPC8xx ppc-specific parts of comm processor
#
@@ -13,5 +15,6 @@
obj-$(CONFIG_FEC_ENET) += fec.o
obj-$(CONFIG_SCC_ENET) += enet.o
+obj-$(CONFIG_UCODE_PATCH) += micropatch.o
include $(TOPDIR)/Rules.make
Index: commproc.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/commproc.c,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- commproc.c 14 Jan 2001 19:31:59 -0000 1.1.1.1
+++ commproc.c 10 Apr 2002 15:03:56 -0000 1.2
@@ -1,3 +1,6 @@
+/*
+ * BK Id: SCCS/s.commproc.c 1.15 10/16/01 16:21:52 trini
+ */
/*
* General Purpose functions for the global management of the
@@ -33,7 +36,9 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
-#include "commproc.h"
+#include <asm/commproc.h>
+
+extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep);
static uint dp_alloc_base; /* Starting offset in DP ram */
static uint dp_alloc_top; /* Max offset + 1 */
@@ -44,12 +49,12 @@
/* CPM interrupt vector functions.
*/
struct cpm_action {
- void (*handler)(void *);
+ void (*handler)(void *, struct pt_regs * regs);
void *dev_id;
};
static struct cpm_action cpm_vecs[CPMVEC_NR];
static void cpm_interrupt(int irq, void * dev, struct pt_regs * regs);
-static void cpm_error_interrupt(void *);
+static void cpm_error_interrupt(void *, struct pt_regs * regs);
void
m8xx_cpm_reset(uint host_page_addr)
@@ -61,13 +66,7 @@
imp = (immap_t *)IMAP_ADDR;
commproc = (cpm8xx_t *)&imp->im_cpm;
-#ifdef notdef
- /* We can't do this. It seems to blow away the microcode
- * patch that EPPC-Bug loaded for us. EPPC-Bug uses SCC1 for
- * Ethernet, SMC1 for the console, and I2C for serial EEPROM.
- * Our own drivers quickly reset all of these.
- */
-
+#ifdef CONFIG_UCODE_PATCH
/* Perform a reset.
*/
commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
@@ -75,6 +74,8 @@
/* Wait for it.
*/
while (commproc->cp_cpcr & CPM_CR_FLG);
+
+ cpm_load_patch(imp);
#endif
/* Set SDMA Bus Request priority 5.
@@ -94,9 +95,17 @@
*/
host_buffer = host_page_addr; /* Host virtual page address */
host_end = host_page_addr + PAGE_SIZE;
- pte = va_to_pte(host_page_addr);
- pte_val(*pte) |= _PAGE_NO_CACHE;
- flush_tlb_page(init_mm.mmap, host_buffer);
+
+ /* We need to get this page early, so I have to do it the
+ * hard way.
+ */
+ if (get_pteptr(&init_mm, host_page_addr, &pte)) {
+ pte_val(*pte) |= _PAGE_NO_CACHE;
+ flush_tlb_page(init_mm.mmap, host_buffer);
+ }
+ else {
+ panic("Huh? No CPM host page?");
+ }
/* Tell everyone where the comm processor resides.
*/
@@ -142,7 +151,7 @@
vec >>= 11;
if (cpm_vecs[vec].handler != 0)
- (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id);
+ (*cpm_vecs[vec].handler)(cpm_vecs[vec].dev_id, regs);
else
((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << vec);
@@ -159,15 +168,24 @@
* tests in the interrupt handler.
*/
static void
-cpm_error_interrupt(void *dev)
+cpm_error_interrupt(void *dev, struct pt_regs *regs)
{
}
/* Install a CPM interrupt handler.
*/
void
-cpm_install_handler(int vec, void (*handler)(void *), void *dev_id)
+cpm_install_handler(int vec, void (*handler)(void *, struct pt_regs *regs),
+ void *dev_id)
{
+
+ /* If null handler, assume we are trying to free the IRQ.
+ */
+ if (!handler) {
+ cpm_free_handler(vec);
+ return;
+ }
+
if (cpm_vecs[vec].handler != 0)
printk("CPM interrupt %x replacing %x\n",
(uint)handler, (uint)cpm_vecs[vec].handler);
@@ -226,8 +244,9 @@
* The internal baud rate clock is the system clock divided by 16.
* This assumes the baudrate is 16x oversampled by the uart.
*/
-#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq * 1000000)
-#define BRG_UART_CLK (BRG_INT_CLK/16)
+#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq)
+#define BRG_UART_CLK (BRG_INT_CLK/16)
+#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16)
void
m8xx_cpm_setbrg(uint brg, uint rate)
@@ -238,6 +257,12 @@
*/
bp = (uint *)&cpmp->cp_brgc1;
bp += brg;
- *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
+ /* The BRG has a 12-bit counter. For really slow baud rates (or
+ * really fast processors), we may have to further divide by 16.
+ */
+ if (((BRG_UART_CLK / rate) - 1) < 4096)
+ *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
+ else
+ *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
+ CPM_BRG_EN | CPM_BRG_DIV16;
}
-
Index: enet.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/enet.c,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -r1.1.1.2 -r1.2
--- enet.c 25 Feb 2001 23:15:18 -0000 1.1.1.2
+++ enet.c 10 Apr 2002 15:03:56 -0000 1.2
@@ -1,4 +1,7 @@
/*
+ * BK Id: SCCS/s.enet.c 1.17 10/11/01 11:55:47 trini
+ */
+/*
* Ethernet driver for Motorola MPC8xx.
* Copyright (c) 1997 Dan Malek (dm...@jl...)
*
@@ -8,7 +11,7 @@
* This version of the driver is somewhat selectable for the different
* processor/board combinations. It works for the boards I know about
* now, and should be easily modified to include others. Some of the
- * configuration information is contained in "commproc.h" and the
+ * configuration information is contained in <asm/commproc.h> and the
* remainder is here.
*
* Buffer descriptors are kept in the CPM dual port RAM, and the frame
@@ -44,7 +47,7 @@
#include <asm/mpc8xx.h>
#include <asm/bitops.h>
#include <asm/uaccess.h>
-#include "commproc.h"
+#include <asm/commproc.h>
/*
* Theory of Operation
@@ -80,7 +83,7 @@
* programming documents for details unique to your board.
*
* For the TQM8xx(L) modules, there is no control register interface.
- * All functions are directly controlled using I/O pins. See commproc.h.
+ * All functions are directly controlled using I/O pins. See <asm/commproc.h>.
*/
/* The transmitter timeout
@@ -144,7 +147,7 @@
static int scc_enet_open(struct net_device *dev);
static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
static int scc_enet_rx(struct net_device *dev);
-static void scc_enet_interrupt(void *dev_id);
+static void scc_enet_interrupt(void *dev_id, struct pt_regs *regs);
static int scc_enet_close(struct net_device *dev);
static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
static void set_multicast_list(struct net_device *dev);
@@ -154,20 +157,26 @@
/*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/
/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards
- * use SCC2. This is easily extended if necessary.
+ * use SCC2. Some even may use SCC3.
+ * This is easily extended if necessary.
*/
-#ifdef CONFIG_SCC2_ENET
+#if defined(CONFIG_SCC3_ENET)
+#define CPM_CR_ENET CPM_CR_CH_SCC3
+#define PROFF_ENET PROFF_SCC3
+#define SCC_ENET 2 /* Index, not number! */
+#define CPMVEC_ENET CPMVEC_SCC3
+#elif defined(CONFIG_SCC2_ENET)
#define CPM_CR_ENET CPM_CR_CH_SCC2
#define PROFF_ENET PROFF_SCC2
#define SCC_ENET 1 /* Index, not number! */
#define CPMVEC_ENET CPMVEC_SCC2
-#endif
-
-#ifdef CONFIG_SCC1_ENET
-#define CPM_CR_ENET CPM_CR_CH_SCC1
+#elif defined(CONFIG_SCC1_ENET)
+#define CPM_CR_ENET CPM_CR_CH_SCC1
#define PROFF_ENET PROFF_SCC1
-#define SCC_ENET 0
+#define SCC_ENET 0 /* Index, not number! */
#define CPMVEC_ENET CPMVEC_SCC1
+#else
+#error CONFIG_SCCx_ENET not defined
#endif
static int
@@ -294,7 +303,7 @@
* This is called from the CPM handler, not the MPC core interrupt.
*/
static void
-scc_enet_interrupt(void *dev_id)
+scc_enet_interrupt(void *dev_id, struct pt_regs *regs)
{
struct net_device *dev = dev_id;
volatile struct scc_enet_private *cep;
@@ -645,7 +654,7 @@
cp = cpmp; /* Get pointer to Communication Processor */
- immap = (immap_t *)IMAP_ADDR; /* and to internal registers */
+ immap = (immap_t *)(mfspr(IMMR) & 0xFFFF0000); /* and to internal registers */
bd = (bd_t *)__res;
@@ -683,28 +692,47 @@
* It can't last though......
*/
+#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
/* Configure port A pins for Txd and Rxd.
*/
- immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
+ immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
- immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
+ immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
+#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
+ /* Configure port B pins for Txd and Rxd.
+ */
+ immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
+ immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
+ immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
+#else
+#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
+#endif
+
+#if defined(PC_ENET_LBK)
+ /* Configure port C pins to disable External Loopback
+ */
+ immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
+ immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
+ immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
+ immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
+#endif /* PC_ENET_LBK */
/* Configure port C pins to enable CLSN and RENA.
*/
immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
+ immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
/* Configure port A for TCLK and RCLK.
*/
- immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
+ immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
/* Configure Serial Interface clock routing.
* First, clear all SCC bits to zero, then set the ones we want.
*/
cp->cp_sicr &= ~SICR_ENET_MASK;
- cp->cp_sicr |= SICR_ENET_CLKRT;
+ cp->cp_sicr |= SICR_ENET_CLKRT;
/* Manual says set SDDR, but I can't find anything with that
* name. I think it is a misprint, and should be SDCR. This
@@ -777,22 +805,10 @@
ep->sen_iaddr4 = 0;
/* Set Ethernet station address.
- *
- * If we performed a MBX diskless boot, the Ethernet controller
- * has been initialized and we copy the address out into our
- * own structure.
- *
- * All other types of boards supply the address in the board
- * information structure, so we copy that into the controller.
*/
eap = (unsigned char *)&(ep->sen_paddrh);
-#ifndef CONFIG_MBX
for (i=5; i>=0; i--)
*eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
-#else
- for (i=5; i>=0; i--)
- dev->dev_addr[i] = *eap++;
-#endif
ep->sen_pper = 0; /* 'cause the book says so */
ep->sen_taddrl = 0; /* temp address (LSB) */
@@ -884,20 +900,17 @@
/* It is now OK to enable the Ethernet transmitter.
* Unfortunately, there are board implementation differences here.
*/
-#if (defined(CONFIG_MBX) || defined(CONFIG_TQM860) || defined(CONFIG_TQM860L) || defined(CONFIG_FPS850))
- immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
+#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA))
+ immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
-#endif
-
-#if (defined(CONFIG_TQM8xxL) && !defined(CONFIG_FPS850))
+#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
+#else
+#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-
/* And while we are here, set the configuration to enable ethernet.
*/
*((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
@@ -906,9 +919,6 @@
#endif
#ifdef CONFIG_BSEIP
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-
/* BSE uses port B and C for PHY control.
*/
cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
@@ -921,6 +931,14 @@
immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
#endif
+#ifdef CONFIG_FADS
+ cp->cp_pbpar |= PB_ENET_TENA;
+ cp->cp_pbdir |= PB_ENET_TENA;
+
+ /* Enable the EEST PHY.
+ */
+ *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
+#endif
dev->base_addr = (unsigned long)ep;
dev->priv = cep;
@@ -941,11 +959,10 @@
*/
sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- printk("%s: CPM ENET Version 0.2, ", dev->name);
+ printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1);
for (i=0; i<5; i++)
printk("%02x:", dev->dev_addr[i]);
printk("%02x\n", dev->dev_addr[5]);
return 0;
}
-
Index: fec.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/fec.c,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -r1.1.1.2 -r1.2
--- fec.c 25 Feb 2001 23:15:18 -0000 1.1.1.2
+++ fec.c 10 Apr 2002 15:03:56 -0000 1.2
@@ -1,4 +1,7 @@
/*
+ * BK Id: SCCS/s.fec.c 1.20 10/11/01 11:55:47 trini
+ */
+/*
* Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
* Copyright (c) 1997 Dan Malek (dm...@jl...)
*
@@ -8,7 +11,9 @@
* describes connections using the internal parallel port I/O, which
* is basically all of Port D.
*
[...969 lines suppressed...]
/* Clear outstanding MII command interrupts.
*/
fecp->fec_ievent = FEC_ENET_MII;
- /* Enable MII command finihed interrupt
+ /* Enable MII command finished interrupt
*/
fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
fecp->fec_imask = FEC_ENET_MII;
+#ifdef CONFIG_USE_MDIO
/* Set MII speed.
*/
fecp->fec_mii_speed = fep->phy_speed;
+#endif /* CONFIG_USE_MDIO */
+
+ /* Disable FEC
+ */
+ fecp->fec_ecntrl &= ~(FEC_ECNTRL_ETHER_EN);
}
Index: uart.c
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/arch/ppc/8xx_io/uart.c,v
retrieving revision 1.1.1.2
retrieving revision 1.2
diff -u -r1.1.1.2 -r1.2
--- uart.c 25 Feb 2001 23:15:18 -0000 1.1.1.2
+++ uart.c 10 Apr 2002 15:03:56 -0000 1.2
@@ -1,4 +1,7 @@
/*
+ * BK Id: SCCS/s.uart.c 1.19 10/26/01 09:59:32 trini
+ */
+/*
* UART driver for MPC860 CPM SCC or SMC
* Copyright (c) 1997 Dan Malek (dm...@jl...)
*
@@ -40,7 +43,10 @@
#include <asm/uaccess.h>
#include <asm/8xx_immap.h>
#include <asm/mpc8xx.h>
-#include "commproc.h"
+#include <asm/commproc.h>
+#ifdef CONFIG_MAGIC_SYSRQ
+#include <linux/sysrq.h>
+#endif
#ifdef CONFIG_KGDB
extern void breakpoint(void);
@@ -53,10 +59,22 @@
/* this defines the index into rs_table for the port to use
*/
-#ifndef CONFIG_SERIAL_CONSOLE_PORT
-#define CONFIG_SERIAL_CONSOLE_PORT 0
-#endif
-#endif
+# ifndef CONFIG_SERIAL_CONSOLE_PORT
+# ifdef CONFIG_SCC3_ENET
+# ifdef CONFIG_CONS_SMC2
+# define CONFIG_SERIAL_CONSOLE_PORT 0 /* Console on SMC2 is 1st port */
+# else
+# error "Can't use SMC1 for console with Ethernet on SCC3"
+# endif
+# else /* ! CONFIG_SCC3_ENET */
+# ifdef CONFIG_CONS_SMC2 /* Console on SMC2 */
+# define CONFIG_SERIAL_CONSOLE_PORT 1
+# else /* Console on SMC1 */
+# define CONFIG_SERIAL_CONSOLE_PORT 0
+# endif /* CONFIG_CONS_SMC2 */
+# endif /* CONFIG_SCC3_ENET */
+# endif /* CONFIG_SERIAL_CONSOLE_PORT */
+#endif /* CONFIG_SERIAL_CONSOLE */
#if 0
/* SCC2 for console
@@ -76,6 +94,15 @@
static int serial_refcount;
static int serial_console_setup(struct console *co, char *options);
+static void serial_console_write(struct console *c, const char *s,
+ unsigned count);
+static kdev_t serial_console_device(struct console *c);
+static int serial_console_wait_key(struct console *co);
+
+#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+static unsigned long break_pressed; /* break, really ... */
+#endif
+
/*
* Serial driver configuration section. Here are the various options:
*/
@@ -118,14 +145,22 @@
*/
static struct serial_state rs_table[] = {
/* UART CLK PORT IRQ FLAGS NUM */
- { 0, 0, PROFF_SMC1, CPMVEC_SMC1, 0, 0 }, /* SMC1 ttyS0 */
-#ifdef CONFIG_8xxSMC2
- { 0, 0, PROFF_SMC2, CPMVEC_SMC2, 0, 1 }, /* SMC2 ttyS1 */
-#endif
-#ifdef CONFIG_8xxSCC
- { 0, 0, PROFF_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) }, /* SCC2 ttyS2 */
- { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) }, /* SCC3 ttyS3 */
+#ifndef CONFIG_SCC3_ENET /* SMC1 not usable with Ethernet on SCC3 */
+ { 0, 0, PROFF_SMC1, CPMVEC_SMC1, 0, 0 }, /* SMC1 ttyS0 */
#endif
+#if !defined(CONFIG_USB_MPC8xx) && !defined(CONFIG_USB_CLIENT_MPC8xx)
+# ifdef CONFIG_SMC2_UART
+ { 0, 0, PROFF_SMC2, CPMVEC_SMC2, 0, 1 }, /* SMC2 ttyS1 */
+# endif
+# ifdef CONFIG_USE_SCC_IO
+ { 0, 0, PROFF_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) }, /* SCC2 ttyS2 */
+ { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) }, /* SCC3 ttyS3 */
+# endif
+ #else /* CONFIG_USB_xxx */
+# ifdef CONFIG_USE_SCC_IO
+ { 0, 0, PROFF_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) }, /* SCC3 ttyS3 */
+# endif
+#endif /* CONFIG_USB_xxx */
};
#define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
@@ -179,6 +214,16 @@
cbd_t *tx_cur;
} ser_info_t;
+static struct console sercons = {
+ name: "ttyS",
+ write: serial_console_write,
+ device: serial_console_device,
+ wait_key: serial_console_wait_key,
+ setup: serial_console_setup,
+ flags: CON_PRINTBUFFER,
+ index: CONFIG_SERIAL_CONSOLE_PORT,
+};
+
static void change_speed(ser_info_t *info);
static void rs_8xx_wait_until_sent(struct tty_struct *tty, int timeout);
@@ -302,7 +347,7 @@
mark_bh(SERIAL_BH);
}
-static _INLINE_ void receive_chars(ser_info_t *info)
+static _INLINE_ void receive_chars(ser_info_t *info, struct pt_regs *regs)
{
struct tty_struct *tty = info->tty;
unsigned char ch, *cp;
@@ -390,7 +435,7 @@
}
*/
status &= info->read_status_mask;
-
+
if (status & (BD_SC_BR)) {
#ifdef SERIAL_DEBUG_INTR
printk("handling break....");
@@ -417,6 +462,17 @@
}
}
}
+#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ if (break_pressed && info->line == sercons.index) {
+ if (ch != 0 && time_before(jiffies,
+ break_pressed + HZ*5)) {
+ handle_sysrq(ch, regs, NULL, NULL);
+ break_pressed = 0;
+ goto ignore_char;
+ } else
+ break_pressed = 0;
+ }
+#endif
if (tty->flip.count >= TTY_FLIPBUF_SIZE)
break;
@@ -425,6 +481,9 @@
tty->flip.count++;
}
+#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ ignore_char:
+#endif
/* This BD is ready to be used again. Clear status.
* Get next BD.
*/
@@ -436,17 +495,27 @@
else
bdp++;
}
-
info->rx_cur = (cbd_t *)bdp;
queue_task(&tty->flip.tqueue, &tq_timer);
}
-static _INLINE_ void receive_break(ser_info_t *info)
+static _INLINE_ void receive_break(ser_info_t *info, struct pt_regs *regs)
{
struct tty_struct *tty = info->tty;
info->state->icount.brk++;
+
+#if defined(CONFIG_SERIAL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ if (info->line == sercons.index) {
+ if (!break_pressed) {
+ break_pressed = jiffies;
+ return;
+ } else
+ break_pressed = 0;
+ }
+#endif
+
/* Check to see if there is room in the tty buffer for
* the break. If not, we exit now, losing the break. FIXME
*/
@@ -459,7 +528,7 @@
queue_task(&tty->flip.tqueue, &tq_timer);
}
-static _INLINE_ void transmit_chars(ser_info_t *info)
+static _INLINE_ void transmit_chars(ser_info_t *info, struct pt_regs *regs)
{
if ((info->flags & TX_WAKEUP) ||
@@ -548,7 +617,7 @@
/*
* This is the serial driver's interrupt routine for a single port
*/
-static void rs_8xx_interrupt(void *dev_id)
+static void rs_8xx_interrupt(void *dev_id, struct pt_regs *regs)
{
u_char events;
int idx;
@@ -562,21 +631,23 @@
if (info->state->smc_scc_num & NUM_IS_SCC) {
sccp = &cpmp->cp_scc[idx];
events = sccp->scc_scce;
+ if (events & SMCM_BRKE)
+ receive_break(info, regs);
if (events & SCCM_RX)
- receive_chars(info);
+ receive_chars(info, regs);
if (events & SCCM_TX)
- transmit_chars(info);
+ transmit_chars(info, regs);
sccp->scc_scce = events;
}
else {
smcp = &cpmp->cp_smc[idx];
events = smcp->smc_smce;
if (events & SMCM_BRKE)
- receive_break(info);
+ receive_break(info, regs);
if (events & SMCM_RX)
- receive_chars(info);
+ receive_chars(info, regs);
if (events & SMCM_TX)
- transmit_chars(info);
+ transmit_chars(info, regs);
smcp->smc_smce = events;
}
@@ -807,7 +878,7 @@
static void change_speed(ser_info_t *info)
{
int baud_rate;
- unsigned cflag, cval, scval, prev_mode;
+ unsigned cflag, cval, scval, prev_mode, new_mode;
int i, bits, sbits, idx;
unsigned long flags;
struct serial_state *state;
@@ -848,10 +919,10 @@
cval |= SMCMR_PEN;
scval |= SCU_PMSR_PEN;
bits++;
- }
- if (!(cflag & PARODD)) {
- cval |= SMCMR_PM_EVEN;
- scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
+ if (!(cflag & PARODD)) {
+ cval |= SMCMR_PM_EVEN;
+ scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
+ }
}
/* Determine divisor based on baud rate */
@@ -924,7 +995,13 @@
idx = PORT_NUM(state->smc_scc_num);
if (state->smc_scc_num & NUM_IS_SCC) {
sccp = &cpmp->cp_scc[idx];
- sccp->scc_pmsr = (sbits << 12) | scval;
+ new_mode = (sbits << 12) | scval;
+ prev_mode = sccp->scc_pmsr;
+ if (!(prev_mode & SCU_PMSR_PEN))
+ /* If parity is disabled, mask out even/odd */
+ prev_mode &= ~(SCU_PMSR_TPM|SCU_PMSR_RPM);
+ if (prev_mode != new_mode)
+ sccp->scc_pmsr = new_mode;
}
else {
smcp = &cpmp->cp_smc[idx];
@@ -934,8 +1011,13 @@
* present.
*/
prev_mode = smcp->smc_smcmr;
- smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
- smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
+ new_mode = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
+ new_mode |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
+ if (!(prev_mode & SMCMR_PEN))
+ /* If parity is disabled, mask out even/odd */
+ prev_mode &= ~SMCMR_PM_EVEN;
+ if (prev_mode != new_mode)
+ smcp->smc_smcmr = new_mode;
}
m8xx_cpm_setbrg((state - rs_table), baud_rate);
@@ -2405,17 +2487,6 @@
return MKDEV(TTY_MAJOR, 64 + c->index);
}
-
-static struct console sercons = {
- name: "ttyS",
- write: serial_console_write,
- device: serial_console_device,
- wait_key: serial_console_wait_key,
- setup: serial_console_setup,
- flags: CON_PRINTBUFFER,
- index: CONFIG_SERIAL_CONSOLE_PORT,
-};
-
/*
* Register console.
*/
@@ -2513,7 +2584,7 @@
/* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
*/
-#ifdef CONFIG_8xxSCC
+#ifdef CONFIG_USE_SCC_IO
#ifndef CONFIG_MBX
/* The "standard" configuration through the 860.
*/
@@ -2727,16 +2798,16 @@
* parallel I/O. On 823/850 these are on
* port A for SMC2.
*/
-#ifndef CONFIG_8xx_ALTSMC2
+#ifndef CONFIG_ALTSMC2
iobits = 0xc0 << (idx * 4);
cp->cp_pbpar |= iobits;
cp->cp_pbdir &= ~iobits;
cp->cp_pbodr &= ~iobits;
#else
+ iobits = 0xc0;
if (idx == 0) {
/* SMC1 on Port B, like all 8xx.
*/
- iobits = 0xc0;
cp->cp_pbpar |= iobits;
cp->cp_pbdir &= ~iobits;
cp->cp_pbodr &= ~iobits;
@@ -2744,12 +2815,11 @@
else {
/* SMC2 is on Port A.
*/
- iobits = 0x300;
immap->im_ioport.iop_papar |= iobits;
immap->im_ioport.iop_padir &= ~iobits;
immap->im_ioport.iop_paodr &= ~iobits;
}
-#endif
+#endif /* CONFIG_ALTSMC2 */
/* Connect the baud rate generator to the
* SMC based upon index in rs_table. Also
@@ -2836,6 +2906,9 @@
for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
if (bd->bi_baudrate == baud_table[bidx])
break;
+ /* make sure we have a useful value */
+ if (bidx == (sizeof(baud_table) / sizeof(int)))
+ bidx = 13; /* B9600 */
co->cflag = CREAD|CLOCAL|bidx|CS8;
baud_idx = bidx;
@@ -2958,7 +3031,7 @@
*/
chan = smc_chan_map[idx];
cp->cp_cpcr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- printk("");
+ printk("%s", "");
while (cp->cp_cpcr & CPM_CR_FLG);
/* Set UART mode, 8 bit, no parity, one stop.
--- commproc.h DELETED ---
|
