[LV-kern-commit] CVS: kernel-2.4/include/asm-arm/arch-l7200 aux_reg.h,NONE,1.1 gp_timers.h,NONE,1.1

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Update of /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200
In directory usw-pr-cvs1:/tmp/cvs-serv9454/asm-arm/arch-l7200

Modified Files:
	dma.h hardware.h io.h irq.h irqs.h memory.h param.h system.h 
	time.h 
Added Files:
	aux_reg.h gp_timers.h gpio.h keyboard.h pmpcon.h pmu.h 
	serial.h sib.h sys-clock.h 
Log Message:
Synch to 2.4.15 commit 1

--- NEW FILE ---
/*
 * linux/include/asm-arm/arch-l7200/aux_reg.h
 *
 * Copyright (C) 2000 Steve Hill (sj...@co...)
 *
 * Changelog:
 *   08-02-2000	SJH	Created file
 */
#ifndef _ASM_ARCH_AUXREG_H
#define _ASM_ARCH_AUXREG_H

#include <asm/arch/hardware.h>

#define l7200aux_reg	*((volatile unsigned int *) (AUX_BASE))

/*
 * Auxillary register values
 */
#define AUX_CLEAR		0x00000000
#define AUX_DIAG_LED_ON		0x00000002
#define AUX_RTS_UART1		0x00000004
#define AUX_DTR_UART1		0x00000008
#define AUX_KBD_COLUMN_12_HIGH	0x00000010
#define AUX_KBD_COLUMN_12_OFF	0x00000020
#define AUX_KBD_COLUMN_13_HIGH	0x00000040
#define AUX_KBD_COLUMN_13_OFF	0x00000080

#endif

--- NEW FILE ---
/*
 * linux/include/asm-arm/arch-l7200/gp_timers.h
 *
 * Copyright (C) 2000 Steve Hill (sj...@co...)
 *
 * Changelog:
 *   07-28-2000	SJH	Created file
 *   08-02-2000	SJH	Used structure for registers
 */
#ifndef _ASM_ARCH_GPTIMERS_H
#define _ASM_ARCH_GPTIMERS_H

#include <asm/arch/hardware.h>

/*
 * Layout of L7200 general purpose timer registers
 */
struct GPT_Regs {
	unsigned int TIMERLOAD;
	unsigned int TIMERVALUE;
	unsigned int TIMERCONTROL;
	unsigned int TIMERCLEAR;
};

#define GPT_BASE		(IO_BASE_2 + 0x3000)
#define l7200_timer1_regs	((volatile struct GPT_Regs *) (GPT_BASE))
#define l7200_timer2_regs	((volatile struct GPT_Regs *) (GPT_BASE + 0x20))

/*
 * General register values
 */
#define	GPT_PRESCALE_1		0x00000000
#define	GPT_PRESCALE_16		0x00000004
#define	GPT_PRESCALE_256	0x00000008
#define GPT_MODE_FREERUN	0x00000000
#define GPT_MODE_PERIODIC	0x00000040
#define GPT_ENABLE		0x00000080
#define GPT_BZTOG		0x00000100
#define GPT_BZMOD		0x00000200
#define GPT_LOAD_MASK 		0x0000ffff

#endif

--- NEW FILE ---
/****************************************************************************/
/*
 *      linux/include/asm-arm/arch-l7200/gpio.h
 *
 *      Registers and  helper functions for the L7200 Link-Up Systems
 *      GPIO.
 *
 *      (C) Copyright 2000, S A McConnell  (sam...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/****************************************************************************/

#define GPIO_OFF   0x00005000  /* Offset from IO_START to the GPIO reg's. */

/* IO_START and IO_BASE are defined in hardware.h */

#define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */
#define GPIO_BASE  (IO_BASE_2  + GPIO_OFF) /* Virtual addr of the GPIO reg. */

/* Offsets from the start of the GPIO for all the registers. */
#define PADR_OFF     0x000
#define PADDR_OFF    0x004
#define PASBSR_OFF   0x008
#define PAEENR_OFF   0x00c
#define PAESNR_OFF   0x010
#define PAESTR_OFF   0x014
#define PAIMR_OFF    0x018
#define PAINT_OFF    0x01c

#define PBDR_OFF     0x020
#define PBDDR_OFF    0x024
#define PBSBSR_OFF   0x028
#define PBIMR_OFF    0x038
#define PBINT_OFF    0x03c

#define PCDR_OFF     0x040
#define PCDDR_OFF    0x044
#define PCSBSR_OFF   0x048
#define PCIMR_OFF    0x058
#define PCINT_OFF    0x05c

#define PDDR_OFF     0x060
#define PDDDR_OFF    0x064
#define PDSBSR_OFF   0x068
#define PDEENR_OFF   0x06c
#define PDESNR_OFF   0x070
#define PDESTR_OFF   0x074
#define PDIMR_OFF    0x078
#define PDINT_OFF    0x07c

#define PEDR_OFF     0x080
#define PEDDR_OFF    0x084
#define PESBSR_OFF   0x088
#define PEEENR_OFF   0x08c
#define PEESNR_OFF   0x090
#define PEESTR_OFF   0x094
#define PEIMR_OFF    0x098
#define PEINT_OFF    0x09c

/* Define the GPIO registers for use by device drivers and the kernel. */
#define PADR   (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF))
#define PADDR  (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF))
#define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF))
#define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF))
#define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF))
#define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF))
#define PAIMR  (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF))
#define PAINT  (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF))

#define PBDR   (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF))
#define PBDDR  (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF))
#define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF))
#define PBIMR  (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF))
#define PBINT  (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF))

#define PCDR   (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF))
#define PCDDR  (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF))
#define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF))
#define PCIMR  (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF))
#define PCINT  (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF))

#define PDDR   (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF))
#define PDDDR  (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF))
#define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF))
#define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF))
#define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF))
#define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF))
#define PDIMR  (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF))
#define PDINT  (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF))

#define PEDR   (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF))
#define PEDDR  (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF))
#define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF))
#define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF))
#define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF))
#define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF))
#define PEIMR  (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF))
#define PEINT  (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF))

#define VEE_EN         0x02
#define BACKLIGHT_EN   0x04

--- NEW FILE ---
/*
 *  linux/include/asm-arm/arch-l7200/keyboard.h
 *
 *  Keyboard driver definitions for LinkUp Systems L7200 architecture
 *
 *  Copyright (C) 2000 Scott A McConnell (sam...@co...)
 *                     Steve Hill (sj...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 *
 * Changelog:
 *   07-18-2000	SAM	Created file
 *   07-28-2000	SJH	Complete rewrite
 */

#include <asm/irq.h>

/*
 * Layout of L7200 keyboard registers
 */
struct KBD_Port {       
	unsigned int KBDR;
	unsigned int KBDMR;
	unsigned int KBSBSR;
	unsigned int Reserved;
	unsigned int KBKSR;
};

#define KBD_BASE        IO_BASE_2 + 0x4000
#define l7200kbd_hwregs ((volatile struct KBD_Port *) (KBD_BASE))

extern void l7200kbd_init_hw(void);
extern int l7200kbd_translate(unsigned char scancode, unsigned char *keycode,
			      char raw_mode);

#define kbd_setkeycode(sc,kc)		(-EINVAL)
#define kbd_getkeycode(sc)		(-EINVAL)

#define kbd_translate(sc, kcp, rm)      ({ *(kcp) = (sc); 1; })
#define kbd_unexpected_up(kc)           (0200)
#define kbd_leds(leds)                  do {} while (0)
#define kbd_init_hw()                   l7200kbd_init_hw()
#define kbd_sysrq_xlate                 ((unsigned char *)NULL)
#define kbd_disable_irq()               disable_irq(IRQ_GCTC2)
#define kbd_enable_irq()                enable_irq(IRQ_GCTC2)

#define SYSRQ_KEY	13

--- NEW FILE ---
/****************************************************************************/
/*
 *  linux/include/asm-arm/arch-l7200/pmpcon.h
 *
 *   Registers and  helper functions for the L7200 Link-Up Systems
 *   DC/DC converter register.
 *
 *   (C) Copyright 2000, S A McConnell  (sam...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/****************************************************************************/

#define PMPCON_OFF 0x00006000  /* Offset from IO_START_2. */

/* IO_START_2 and IO_BASE_2 are defined in hardware.h */

#define PMPCON_START (IO_START_2 + PMPCON_OFF)  /* Physical address of reg. */
#define PMPCON_BASE  (IO_BASE_2  + PMPCON_OFF)  /* Virtual address of reg. */


#define PMPCON (*(volatile unsigned int *)(PMPCON_BASE))

#define PWM2_50CYCLE 0x800
#define CONTRAST     0x9

#define PWM1H (CONTRAST)
#define PWM1L (CONTRAST << 4)

#define PMPCON_VALUE  (PWM2_50CYCLE | PWM1L | PWM1H) 
	
/* PMPCON = 0x811;   // too light and fuzzy
 * PMPCON = 0x844;   
 * PMPCON = 0x866;   // better color poor depth
 * PMPCON = 0x888;   // Darker but better depth 
 * PMPCON = 0x899;   // Darker even better depth
 * PMPCON = 0x8aa;   // too dark even better depth
 * PMPCON = 0X8cc;   // Way too dark
 */

/* As CONTRAST value increases the greater the depth perception and
 * the darker the colors.
 */

--- NEW FILE ---
/****************************************************************************/
/*
 *  linux/include/asm-arm/arch-l7200/pmu.h
 *
 *   Registers and  helper functions for the L7200 Link-Up Systems
 *   Power Management Unit (PMU).
 *
 *   (C) Copyright 2000, S A McConnell  (sam...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/****************************************************************************/

#define PMU_OFF   0x00050000  /* Offset from IO_START to the PMU registers. */

/* IO_START and IO_BASE are defined in hardware.h */

#define PMU_START (IO_START + PMU_OFF)  /* Physical addr. of the PMU reg. */
#define PMU_BASE  (IO_BASE  + PMU_OFF)  /* Virtual addr. of the PMU reg. */


/* Define the PMU registers for use by device drivers and the kernel. */

typedef struct {
     unsigned int CURRENT;  /* Current configuration register */
     unsigned int NEXT;     /* Next configuration register */
     unsigned int reserved;
     unsigned int RUN;      /* Run configuration register */
     unsigned int COMM;     /* Configuration command register */
     unsigned int SDRAM;    /* SDRAM configuration bypass register */
} pmu_interface;

#define PMU ((volatile pmu_interface *)(PMU_BASE))


/* Macro's for reading the common register fields. */

#define GET_TRANSOP(reg)  ((reg >> 25) & 0x03) /* Bits 26-25 */
#define GET_OSCEN(reg)    ((reg >> 16) & 0x01)
#define GET_OSCMUX(reg)   ((reg >> 15) & 0x01)
#define GET_PLLMUL(reg)   ((reg >>  9) & 0x3f) /* Bits 14-9 */
#define GET_PLLEN(reg)    ((reg >>  8) & 0x01)
#define GET_PLLMUX(reg)   ((reg >>  7) & 0x01)
#define GET_BCLK_DIV(reg) ((reg >>  3) & 0x03) /* Bits 4-3 */
#define GET_SDRB_SEL(reg) ((reg >>  2) & 0x01)
#define GET_SDRF_SEL(reg) ((reg >>  1) & 0x01)
#define GET_FASTBUS(reg)  (reg & 0x1)

/* CFG_NEXT register */

#define CFG_NEXT_CLOCKRECOVERY ((PMU->NEXT >> 18) & 0x7f)   /* Bits 24-18 */
#define CFG_NEXT_INTRET        ((PMU->NEXT >> 17) & 0x01)
#define CFG_NEXT_SDR_STOP      ((PMU->NEXT >>  6) & 0x01)
#define CFG_NEXT_SYSCLKEN      ((PMU->NEXT >>  5) & 0x01)

/* Useful field values that can be used to construct the
 * CFG_NEXT and CFG_RUN registers.
 */

#define TRANSOP_NOP      0<<25  /* NOCHANGE_NOSTALL */
#define NOCHANGE_STALL   1<<25
#define CHANGE_NOSTALL   2<<25
#define CHANGE_STALL     3<<25

#define INTRET           1<<17
#define OSCEN            1<<16
#define OSCMUX           1<<15

/* PLL frequencies */

#define PLLMUL_0         0<<9         /*  3.6864 MHz */
#define PLLMUL_1         1<<9         /*  ?????? MHz */
#define PLLMUL_5         5<<9         /*  18.432 MHz */
#define PLLMUL_10       10<<9         /*  36.864 MHz */
#define PLLMUL_18       18<<9         /*  ?????? MHz */
#define PLLMUL_20       20<<9         /*  73.728 MHz */
#define PLLMUL_32       32<<9         /*  ?????? MHz */
#define PLLMUL_35       35<<9         /* 129.024 MHz */
#define PLLMUL_36       36<<9         /*  ?????? MHz */
#define PLLMUL_39       39<<9         /*  ?????? MHz */
#define PLLMUL_40       40<<9         /* 147.456 MHz */

/* Clock recovery times */

#define CRCLOCK_1        1<<18
#define CRCLOCK_2        2<<18
#define CRCLOCK_4        4<<18
#define CRCLOCK_8        8<<18
#define CRCLOCK_16      16<<18
#define CRCLOCK_32      32<<18
#define CRCLOCK_63      63<<18
#define CRCLOCK_127    127<<18

#define PLLEN            1<<8
#define PLLMUX           1<<7
#define SDR_STOP         1<<6
#define SYSCLKEN         1<<5

#define BCLK_DIV_4       2<<3
#define BCLK_DIV_2       1<<3
#define BCLK_DIV_1       0<<3

#define SDRB_SEL         1<<2
#define SDRF_SEL         1<<1
#define FASTBUS          1<<0


/* CFG_SDRAM */

#define SDRREFFQ         1<<0  /* Only if SDRSTOPRQ is not set. */
#define SDRREFACK        1<<1  /* Read-only */
#define SDRSTOPRQ        1<<2  /* Only if SDRREFFQ is not set. */
#define SDRSTOPACK       1<<3  /* Read-only */
#define PICEN            1<<4  /* Enable Co-procesor */
#define PICTEST          1<<5

#define GET_SDRREFFQ    ((PMU->SDRAM >> 0) & 0x01)
#define GET_SDRREFACK   ((PMU->SDRAM >> 1) & 0x01) /* Read-only */
#define GET_SDRSTOPRQ   ((PMU->SDRAM >> 2) & 0x01)
#define GET_SDRSTOPACK  ((PMU->SDRAM >> 3) & 0x01) /* Read-only */
#define GET_PICEN       ((PMU->SDRAM >> 4) & 0x01)
#define GET_PICTEST     ((PMU->SDRAM >> 5) & 0x01)

--- NEW FILE ---
/*
 * linux/include/asm-arm/arch-l7200/serial.h
 *
 * Copyright (c) 2000 Rob Scott (rs...@mt...)
 *                    Steve Hill (sj...@co...)
 *
 * Changelog:
 *  03-20-2000  SJH     Created
 *  03-26-2000  SJH     Added flags for serial ports
 *  03-27-2000  SJH     Corrected BASE_BAUD value
 *  04-14-2000  RS      Made register addr dependent on IO_BASE
 *  05-03-2000  SJH     Complete rewrite
 *  05-09-2000	SJH	Stripped out architecture specific serial stuff
 *                      and placed it in a separate file
 *  07-28-2000	SJH	Moved base baud rate variable
 */
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H

/*
 * This assumes you have a 3.6864 MHz clock for your UART.
 */
#define BASE_BAUD	3686400

/*
 * Standard COM flags
 */
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)

#define RS_TABLE_SIZE 2

#define STD_SERIAL_PORT_DEFNS		\
	/* MAGIC UART CLK   PORT       IRQ     FLAGS */			\
	{ 0, BASE_BAUD, UART1_BASE, IRQ_UART_1, STD_COM_FLAGS },  /* ttyLU0 */ \
	{ 0, BASE_BAUD, UART2_BASE, IRQ_UART_2, STD_COM_FLAGS },  /* ttyLU1 */ \

#define EXTRA_SERIAL_PORT_DEFNS

#endif

--- NEW FILE ---
/****************************************************************************/
/*
 *  linux/include/asm-arm/arch-l7200/sib.h
 *
 *  Registers and helper functions for the Serial Interface Bus.
 *
 *  (C) Copyright 2000, S A McConnell  (sam...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/****************************************************************************/

#define SIB_OFF   0x00040000  /* Offset from IO_START to the SIB reg's. */

/* IO_START and IO_BASE are defined in hardware.h */

#define SIB_START (IO_START + SIB_OFF) /* Physical addr of the SIB reg. */
#define SIB_BASE  (IO_BASE  + SIB_OFF) /* Virtual addr of the SIB reg.  */

/* Offsets from the start of the SIB for all the registers. */

/* Define the SIB registers for use by device drivers and the kernel. */

typedef struct
{
     unsigned int MCCR;    /* SIB Control Register           Offset: 0x00 */
     unsigned int RES1;    /* Reserved                       Offset: 0x04 */
     unsigned int MCDR0;   /* SIB Data Register 0            Offset: 0x08 */
     unsigned int MCDR1;   /* SIB Data Register 1            Offset: 0x0c */
     unsigned int MCDR2;   /* SIB Data Register 2 (UCB1x00)  Offset: 0x10 */
     unsigned int RES2;    /* Reserved                       Offset: 0x14 */
     unsigned int MCSR;    /* SIB Status Register            Offset: 0x18 */
} SIB_Interface;

#define SIB ((volatile SIB_Interface *) (SIB_BASE))

/* MCCR */

#define INTERNAL_FREQ   9216000  /* Hertz */
#define AUDIO_FREQ         5000  /* Hertz */
#define TELECOM_FREQ       5000  /* Hertz */

#define AUDIO_DIVIDE    (INTERNAL_FREQ / (32 * AUDIO_FREQ))
#define TELECOM_DIVIDE  (INTERNAL_FREQ / (32 * TELECOM_FREQ))

#define MCCR_ASD57      AUDIO_DIVIDE
#define MCCR_TSD57      (TELECOM_DIVIDE << 8)
#define MCCR_MCE        (1 << 16)             /* SIB enable */
#define MCCR_ECS        (1 << 17)             /* External Clock Select */
#define MCCR_ADM        (1 << 18)             /* A/D Data Sampling */
#define MCCR_PMC        (1 << 26)             /* PIN Multiplexer Control */


#define GET_ASD ((SIB->MCCR >>  0) & 0x3f) /* Audio Sample Rate Div. */
#define GET_TSD ((SIB->MCCR >>  8) & 0x3f) /* Telcom Sample Rate Div. */
#define GET_MCE ((SIB->MCCR >> 16) & 0x01) /* SIB Enable */
#define GET_ECS ((SIB->MCCR >> 17) & 0x01) /* External Clock Select */
#define GET_ADM ((SIB->MCCR >> 18) & 0x01) /* A/D Data Sampling Mode */
#define GET_TTM ((SIB->MCCR >> 19) & 0x01) /* Telco Trans. FIFO I mask */ 
#define GET_TRM ((SIB->MCCR >> 20) & 0x01) /* Telco Recv. FIFO I mask */
#define GET_ATM ((SIB->MCCR >> 21) & 0x01) /* Audio Trans. FIFO I mask */ 
#define GET_ARM ((SIB->MCCR >> 22) & 0x01) /* Audio Recv. FIFO I mask */
#define GET_LBM ((SIB->MCCR >> 23) & 0x01) /* Loop Back Mode */
#define GET_ECP ((SIB->MCCR >> 24) & 0x03) /* Extern. Clck Prescale sel */
#define GET_PMC ((SIB->MCCR >> 26) & 0x01) /* PIN Multiplexer Control */
#define GET_ERI ((SIB->MCCR >> 27) & 0x01) /* External Read Interrupt */
#define GET_EWI ((SIB->MCCR >> 28) & 0x01) /* External Write Interrupt */

/* MCDR0 */

#define AUDIO_RECV     ((SIB->MCDR0 >> 4) & 0xfff)
#define AUDIO_WRITE(v) ((SIB->MCDR0 = (v & 0xfff) << 4))

/* MCDR1 */

#define TELECOM_RECV     ((SIB->MCDR1 >> 2) & 032fff)
#define TELECOM_WRITE(v) ((SIB->MCDR1 = (v & 0x3fff) << 2))


/* MCSR */

#define MCSR_ATU (1 << 4)  /* Audio Transmit FIFO Underrun */
#define MCSR_ARO (1 << 5)  /* Audio Receive  FIFO Underrun */
#define MCSR_TTU (1 << 6)  /* TELECOM Transmit FIFO Underrun */
#define MCSR_TRO (1 << 7)  /* TELECOM Receive  FIFO Underrun */

#define MCSR_CLEAR_UNDERUN_BITS (MCSR_ATU | MCSR_ARO | MCSR_TTU | MCSR_TRO)


#define GET_ATS ((SIB->MCSR >>  0) & 0x01) /* Audio Transmit FIFO Service Req*/
#define GET_ARS ((SIB->MCSR >>  1) & 0x01) /* Audio Recv FIFO Service Request*/
#define GET_TTS ((SIB->MCSR >>  2) & 0x01) /* TELECOM Transmit FIFO  Flag */
#define GET_TRS ((SIB->MCSR >>  3) & 0x01) /* TELECOM Recv FIFO Service Req. */
#define GET_ATU ((SIB->MCSR >>  4) & 0x01) /* Audio Transmit FIFO Underrun */
#define GET_ARO ((SIB->MCSR >>  5) & 0x01) /* Audio Receive  FIFO Underrun */
#define GET_TTU ((SIB->MCSR >>  6) & 0x01) /* TELECOM Transmit FIFO Underrun */
#define GET_TRO ((SIB->MCSR >>  7) & 0x01) /* TELECOM Receive  FIFO Underrun */
#define GET_ANF ((SIB->MCSR >>  8) & 0x01) /* Audio Transmit FIFO not full */
#define GET_ANE ((SIB->MCSR >>  9) & 0x01) /* Audio Receive FIFO not empty */
#define GET_TNF ((SIB->MCSR >> 10) & 0x01) /* Telecom Transmit FIFO not full */
#define GET_TNE ((SIB->MCSR >> 11) & 0x01) /* Telecom Receive FIFO not empty */
#define GET_CWC ((SIB->MCSR >> 12) & 0x01) /* Codec Write Complete */
#define GET_CRC ((SIB->MCSR >> 13) & 0x01) /* Codec Read Complete */
#define GET_ACE ((SIB->MCSR >> 14) & 0x01) /* Audio Codec Enabled */
#define GET_TCE ((SIB->MCSR >> 15) & 0x01) /* Telecom Codec Enabled */

/* MCDR2 */

#define MCDR2_rW               (1 << 16)

#define WRITE_MCDR2(reg, data) (SIB->MCDR2 =((reg<<17)|MCDR2_rW|(data&0xffff)))
#define MCDR2_WRITE_COMPLETE   GET_CWC

#define INITIATE_MCDR2_READ(reg) (SIB->MCDR2 = (reg << 17))
#define MCDR2_READ_COMPLETE      GET_CRC
#define MCDR2_READ               (SIB->MCDR2 & 0xffff)

--- NEW FILE ---
/****************************************************************************/
/*
 *  linux/include/asm-arm/arch-l7200/sys-clock.h
 *
 *   Registers and  helper functions for the L7200 Link-Up Systems
 *   System clocks.
 *
 *   (C) Copyright 2000, S A McConnell  (sam...@co...)
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License. See the file COPYING in the main directory of this archive for
 *  more details.
 */

/****************************************************************************/

#define SYS_CLOCK_OFF   0x00050030  /* Offset from IO_START. */

/* IO_START and IO_BASE are defined in hardware.h */

#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF)  /* Physical address */
#define SYS_CLOCK_BASE  (IO_BASE  + SYS_CLOCK_OFF)  /* Virtual address  */

/* Define the interface to the SYS_CLOCK */

typedef struct
{
     unsigned int ENABLE;
     unsigned int ESYNC;
     unsigned int SELECT;
} sys_clock_interface;

#define SYS_CLOCK   ((volatile sys_clock_interface *)(SYS_CLOCK_BASE))

//#define CLOCK_EN    (*(volatile unsigned long *)(PMU_BASE+CLOCK_EN_OFF))
//#define CLOCK_ESYNC (*(volatile unsigned long *)(PMU_BASE+CLOCK_ESYNC_OFF))
//#define CLOCK_SEL   (*(volatile unsigned long *)(PMU_BASE+CLOCK_SEL_OFF))

/* SYS_CLOCK -> ENABLE */

#define SYN_EN          1<<0
#define B18M_EN         1<<1
#define CLK3M6_EN       1<<2
#define BUART_EN        1<<3
#define CLK18MU_EN      1<<4
#define FIR_EN          1<<5
#define MIRN_EN         1<<6
#define UARTM_EN        1<<7
#define SIBADC_EN       1<<8
#define ALTD_EN         1<<9
#define CLCLK_EN        1<<10

/* SYS_CLOCK -> SELECT */

#define CLK18M_DIV      1<<0
#define MIR_SEL         1<<1
#define SSP_SEL         1<<4
#define MM_DIV          1<<5
#define MM_SEL          1<<6
#define ADC_SEL_2       0<<7
#define ADC_SEL_4       1<<7
#define ADC_SEL_8       3<<7
#define ADC_SEL_16      7<<7
#define ADC_SEL_32      0x0f<<7
#define ADC_SEL_64      0x1f<<7
#define ADC_SEL_128     0x3f<<7
#define ALTD_SEL        1<<13

Index: dma.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/dma.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- dma.h	14 Jan 2001 16:58:58 -0000	1.1.1.1
+++ dma.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -1,26 +1,24 @@
 /*
  * linux/include/asm-arm/arch-l7200/dma.h
+ *
+ * Copyright (C) 2000 Steve Hill (sj...@co...)
+ *
+ * Changelog:
+ *  08-29-2000	SJH	Created
  */
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
+/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
+
 /*
  * This is the maximum DMA address that can be DMAd to.
  * There should not be more than (0xd0000000 - 0xc0000000)
  * bytes of RAM.
  */
-#define MAX_DMA_ADDRESS		0xd0000000
-#define MAX_DMA_CHANNELS	8
-
-#define DMA_0			0
-#define DMA_1			1
-#define DMA_2			2
-#define DMA_3			3
-#define DMA_S0			4
-#define DMA_S1			5
-#define DMA_VIRTUAL_FLOPPY	6
-#define DMA_VIRTUAL_SOUND	7
+#define MAX_DMA_ADDRESS         0xd0000000
+#define MAX_DMA_CHANNELS        0
 
-#define DMA_FLOPPY		DMA_VIRTUAL_FLOPPY
+#define DMA_S0                  0
 
-#endif
+#endif /* _ASM_ARCH_DMA_H */

Index: hardware.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/hardware.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- hardware.h	14 Jan 2001 16:58:58 -0000	1.1.1.1
+++ hardware.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -13,6 +13,8 @@
  *   04-21-2000	 RS 	Changed mapping of I/O in virtual space
  *   04-25-2000	SJH	Removed unused symbols and such
  *   05-05-2000	SJH	Complete rewrite
+ *   07-31-2000	SJH	Added undocumented debug auxillary port to
+ *			get at last two columns for keyboard driver
  */
 #ifndef __ASM_ARCH_HARDWARE_H
 #define __ASM_ARCH_HARDWARE_H
@@ -33,6 +35,18 @@
 #define IO_START_2		0x90000000      /* I/O */
 #define IO_SIZE_2		0x01000000
 #define IO_BASE_2		0xd1000000
+
+#define AUX_START		0x1a000000      /* AUX PORT */
+#define AUX_SIZE 		0x01000000
+#define AUX_BASE		0xd2000000
+
+#define FLASH1_START		0x00000000      /* FLASH BANK 1 */
+#define FLASH1_SIZE 		0x01000000
+#define FLASH1_BASE		0xd3000000
+
+#define FLASH2_START		0x10000000      /* FLASH BANK 2 */
+#define FLASH2_SIZE 		0x01000000
+#define FLASH2_BASE		0xd4000000
 
 #define ISA_START		0x20000000	/* ISA */
 #define ISA_SIZE		0x20000000

Index: io.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/io.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- io.h	14 Jan 2001 16:58:58 -0000	1.1.1.1
+++ io.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -3,8 +3,9 @@
  *
  * Copyright (C) 2000 Steve Hill (sj...@co...)
  *
- * Modifications:
+ * Changelog:
  *  03-21-2000	SJH	Created from linux/include/asm-arm/arch-nexuspci/io.h
+ *  08-31-2000	SJH	Added in IO functions necessary for new drivers
  */
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
@@ -14,16 +15,49 @@
 #define IO_SPACE_LIMIT 0xffffffff
 
 /*
+ * There are not real ISA nor PCI buses, so we fake it.
+ */
+#define __io_pci(a)             (PCIO_BASE + (a))
+#define __mem_pci(a)            ((unsigned long)(a))
+#define __mem_isa(a)            ((unsigned long)(a))
+
+#define __ioaddr(p)             __io_pci(p)
+
+/*
+ * Generic virtual read/write
+ */
+#define __arch_getb(a)          (*(volatile unsigned char *)(a))
+#define __arch_getl(a)          (*(volatile unsigned int  *)(a))
+
+static inline unsigned int __arch_getw(unsigned long a)
+{
+	unsigned int value;
+	__asm__ __volatile__("ldr%?h    %0, [%1, #0]    @ getw"
+		: "=&r" (value)
+		: "r" (a));
+	return value;
+}
+
+#define __arch_putb(v,a)        (*(volatile unsigned char *)(a) = (v))
+#define __arch_putl(v,a)        (*(volatile unsigned int  *)(a) = (v))
+
+static inline void __arch_putw(unsigned int value, unsigned long a)
+{
+        __asm__ __volatile__("str%?h    %0, [%1, #0]    @ putw"
+                : : "r" (value), "r" (a));
+}
+
+/*
  * Translated address IO functions
  *
  * IO address has already been translated to a virtual address
  */
-#define outb_t(v,p)	(*(volatile unsigned char *)(p) = (v))
-#define inb_t(p)	(*(volatile unsigned char *)(p))
-#define outw_t(v,p)	(*(volatile unsigned int *)(p) = (v))
-#define inw_t(p)	(*(volatile unsigned int *)(p))
-#define outl_t(v,p)	(*(volatile unsigned long *)(p) = (v))
-#define inl_t(p)	(*(volatile unsigned long *)(p))
+#define outb_t(v,p)		(*(volatile unsigned char *)(p) = (v))
+#define inb_t(p)		(*(volatile unsigned char *)(p))
+#define outw_t(v,p)		(*(volatile unsigned int *)(p) = (v))
+#define inw_t(p)		(*(volatile unsigned int *)(p))
+#define outl_t(v,p)		(*(volatile unsigned long *)(p) = (v))
+#define inl_t(p)		(*(volatile unsigned long *)(p))
 
 /*
  * FIXME - These are to allow for linking. On all the other
@@ -32,11 +66,13 @@
  *         macros will eventually become more involved. Use
  *         with caution and don't be surprised by kernel oopses!!!
  */
-#define inb(p)	 	inb_t(p)
-#define inw(p)	 	inw_t(p)
-#define inl(p)	 	inl_t(p)
-#define outb(v,p)	outb_t(v,p)
-#define outw(v,p)	outw_t(v,p)
-#define outl(v,p)	outl_t(v,p)
+#define inb(p)		 	inb_t(p)
+#define inw(p)	 		inw_t(p)
+#define inl(p)	 		inl_t(p)
+#define outb(v,p)		outb_t(v,p)
+#define outw(v,p)		outw_t(v,p)
+#define outl(v,p)		outl_t(v,p)
+
+#define __arch_ioremap		__ioremap
 
 #endif

Index: irq.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/irq.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- irq.h	14 Jan 2001 16:58:59 -0000	1.1.1.1
+++ irq.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -10,6 +10,8 @@
  *   05-05-2000 SJH     Complete rewrite
  */
 
+#include <asm/arch/hardware.h>
+
 /*
  * IRQ base register
  */

Index: irqs.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/irqs.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- irqs.h	14 Jan 2001 16:58:59 -0000	1.1.1.1
+++ irqs.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -7,6 +7,12 @@
  * Changelog:
  *   01-02-2000 RS	Create l7200 version
  *   03-28-2000 SJH	Removed unused interrupt
+ *   07-28-2000 SJH	Added pseudo-keyboard interrupt
+ */
+
+/*
+ * NOTE: The second timer (Timer 2) is used as the keyboard
+ *       interrupt when the keyboard driver is enabled.
  */
 
 #define NR_IRQS          32
@@ -16,7 +22,7 @@
 #define IRQ_DEBUG_RX      2   /* Comm Rx debug */
 #define IRQ_DEBUG_TX      3   /* Comm Tx debug */
 #define IRQ_GCTC1         4   /* Timer 1 */
-#define IRQ_GCTC2         5   /* Timer 2 */
+#define IRQ_GCTC2         5   /* Timer 2 / Keyboard */
 #define IRQ_DMA           6   /* DMA controller */
 #define IRQ_CLCD          7   /* Color LCD controller */
 #define IRQ_SM_RX         8   /* Smart card */
@@ -40,6 +46,11 @@
 #define IRQ_INT0         26   /* External active low interrupt */
 #define IRQ_INT1         27   /* External active low interrupt */
 #define IRQ_INT2         28   /* External active low interrupt */
-#define IRQ_INT3         29   /* External active low interrupt */
+#define IRQ_UCB1200      29   /* Interrupt generated by UCB1200*/
 #define IRQ_BAT_LO       30   /* Low batery or external power */
 #define IRQ_MEDIA_CHG    31   /* Media change interrupt */
+
+/*
+ * This is the offset of the FIQ "IRQ" numbers
+ */
+#define FIQ_START	64

Index: memory.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/memory.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- memory.h	14 Jan 2001 16:58:59 -0000	1.1.1.1
+++ memory.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -47,4 +47,6 @@
 #define __bus_to_virt__is_a_macro
 #define __bus_to_virt(x) __phys_to_virt(x)
 
+#define PHYS_TO_NID(addr)	(0)
+
 #endif

Index: param.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/param.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- param.h	14 Jan 2001 16:58:59 -0000	1.1.1.1
+++ param.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -20,4 +20,13 @@
  */
 #define HZ 128
 
+/*
+ * Define hz_to_std, since we have a non 100Hz define
+ * (see include/asm-arm/param.h)
+ */
+
+#if defined(__KERNEL__)
+#define hz_to_std(a) ((a * HZ)/100)
+#endif
+
 #endif

Index: system.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/system.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- system.h	14 Jan 2001 16:59:00 -0000	1.1.1.1
+++ system.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -14,12 +14,11 @@
 
 static void arch_idle(void)
 {
-        while (!current->need_resched && !hlt_counter) {
-		cpu_do_idle(IDLE_WAIT_SLOW);
-	}
+	/* fixme: this needs to be cleaned up (converted from ASM code) --rmk */
+	*(unsigned long *)(IO_BASE + 0x50004) = 1;	/* idle mode */
 }
 
-extern inline void arch_reset(char mode)
+static inline void arch_reset(char mode)
 {
 	if (mode == 's') {
 		cpu_reset(0);

Index: time.h
===================================================================
RCS file: /cvsroot/linux-vax/kernel-2.4/include/asm-arm/arch-l7200/time.h,v
retrieving revision 1.1.1.1
retrieving revision 1.2
diff -u -r1.1.1.1 -r1.2
--- time.h	14 Jan 2001 16:59:00 -0000	1.1.1.1
+++ time.h	9 Apr 2002 12:33:09 -0000	1.2
@@ -40,7 +40,7 @@
 #define RTC_EN_STWDOG	0x08      /* Enable watchdog */
 
 /*
- * Handler for timer interrupt
+ * Handler for RTC timer interrupt
  */
 static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
@@ -50,9 +50,9 @@
 }
 
 /*
- * Set up timer interrupt, and return the current time in seconds.
+ * Set up RTC timer interrupt, and return the current time in seconds.
  */
-extern __inline__ void setup_timer(void)
+static inline void setup_timer(void)
 {
 	RTC_RTCC = 0;				/* Clear interrupt */
 



