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[LV-tools-commit] CVS: tools/src/gcc/config/vax linux.h,1.1,1.1.2.1 pic.h,1.1,1.1.2.1 vax.h,2.17.2.4,2.17.2.5 vax.md,2.12.2.3,2.12.2.4
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From: Dave A. <ai...@us...> - 2002-10-19 11:33:46
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Update of /cvsroot/linux-vax/tools/src/gcc/config/vax
In directory usw-pr-cvs1:/tmp/cvs-serv8441
Modified Files:
Tag: tools-linuxvax-dynamic-dev
linux.h pic.h vax.h vax.md
Log Message:
DA: update spec file in linux.h to include PIC flags, merged PIC code from
NetBSD into machine description.. probably not much else I can do until
I get to a VAX
Index: linux.h
===================================================================
RCS file: /cvsroot/linux-vax/tools/src/gcc/config/vax/linux.h,v
retrieving revision 1.1
retrieving revision 1.1.2.1
diff -u -r1.1 -r1.1.2.1
--- linux.h 26 Jul 2000 23:17:06 -0000 1.1
+++ linux.h 19 Oct 2002 11:33:39 -0000 1.1.2.1
@@ -50,7 +50,14 @@
#define CPP_SPEC "%(cpp_cpu) %{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
#undef CC1_SPEC
-#define CC1_SPEC "%(cc1_cpu) %{profile:-p}"
+#define CC1_SPEC "%(cc1_cpu) %{profile:-p} %{!fno-pic: \
+ %{!mno-pic: %{!fpic: %{!fPIC:-fPIC}}} \
+ %{!mindirect: %{!mno-indirect:-mno-indirect}}} \
+ %{mno-pic: -fno-pic -mindirect} \
+ %{fno-pic: \
+ %{!mindirect: %{!mno-indirect:-mindirect}}}"
+
+#define CC1PLUS_SPEC CC1_SPEC
/* Provide a LINK_SPEC appropriate for Linux. Here we provide support
for the special GCC options -static and -shared, which allow us to
Index: pic.h
===================================================================
RCS file: /cvsroot/linux-vax/tools/src/gcc/config/vax/pic.h,v
retrieving revision 1.1
retrieving revision 1.1.2.1
diff -u -r1.1 -r1.1.2.1
--- pic.h 26 Jul 2000 23:17:06 -0000 1.1
+++ pic.h 19 Oct 2002 11:33:39 -0000 1.1.2.1
@@ -243,6 +243,17 @@
* vax_print_operand_address (FILE, ADDR)
*/
+/* Put relocations in the constant pool in the writable data section. */
+#undef SELECT_RTX_SECTION
+#define SELECT_RTX_SECTION(MODE,RTX) \
+{ \
+ if (flag_pic && vax_symbolic_operand ((RTX), (MODE))) \
+ data_section (); \
+ else \
+ readonly_data_section (); \
+}
+
+
/* externals */
extern void function_prologue ();
Index: vax.h
===================================================================
RCS file: /cvsroot/linux-vax/tools/src/gcc/config/vax/vax.h,v
retrieving revision 2.17.2.4
retrieving revision 2.17.2.5
diff -u -r2.17.2.4 -r2.17.2.5
--- vax.h 17 Oct 2002 13:17:21 -0000 2.17.2.4
+++ vax.h 19 Oct 2002 11:33:39 -0000 2.17.2.5
@@ -375,8 +375,7 @@
/* Given an rtx for the address of a frame,
return an rtx for the address of the word in the frame
that holds the dynamic chain--the previous frame's address. */
-#define DYNAMIC_CHAIN_ADDRESS(frame) \
-gen_rtx (PLUS, Pmode, frame, GEN_INT (12))
+#define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12)
/* If we generate an insn to push BYTES bytes,
this says how many the stack pointer really advances by.
@@ -671,22 +670,23 @@
/* Nonzero if X is a hard reg that can be used as a base reg
or if it is a pseudo reg. */
#define REG_OK_FOR_BASE_P(X) 1
-/*#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X, 0)*/
-/*#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
+#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X, 0)
+#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
do { if (legitimate_address_p(ZMODE, XOP, 0)) goto LABEL; } while (0)
-*/
+
#else
/* Nonzero if X is a hard reg that can be used as an index. */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg. */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
-/*#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X, 1)*/
-/*#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
+#define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X, 1)
+#define GO_IF_LEGITIMATE_ADDRESS(ZMODE, XOP, LABEL) \
do { if (legitimate_address_p(ZMODE, XOP, 1)) goto LABEL; } while (0)
-*/
+
#endif
+#if 0
/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
that is a valid memory address for an instruction.
The MODE argument is the machine mode for the MEM expression
@@ -827,6 +827,7 @@
&& REG_OK_FOR_BASE_P (XEXP (X, 0))) \
goto ADDR; \
GO_IF_REG_PLUS_INDEX (XEXP (X, 0), MODE, ADDR); } } }
+#endif
/* Try machine-dependent ways of modifying an illegitimate address
to be legitimate. If we find one, return the new, valid address.
Index: vax.md
===================================================================
RCS file: /cvsroot/linux-vax/tools/src/gcc/config/vax/vax.md,v
retrieving revision 2.12.2.3
retrieving revision 2.12.2.4
diff -u -r2.12.2.3 -r2.12.2.4
--- vax.md 9 Oct 2002 15:50:34 -0000 2.12.2.3
+++ vax.md 19 Oct 2002 11:33:39 -0000 2.12.2.4
@@ -225,7 +225,31 @@
;; Loads of constants between 64 and 128 used to be done with
;; "addl3 $63,#,dst" but this is slower than movzbl and takes as much space.
-(define_insn "movsi"
+(define_expand "movsi"
+ [(set (match_operand:SI 0 "nonimmediate_operand" "")
+ (match_operand:SI 1 "general_operand" ""))]
+ ""
+ "
+{
+ if (GET_CODE (operands[1]) == CONST &&
+ GET_CODE (XEXP (operands[1], 0)) == PLUS &&
+ GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == SYMBOL_REF &&
+#ifdef NO_EXTERNAL_INDIRECT_ADDRESS
+ (!flag_pic || !SYMBOL_REF_FLAG (XEXP (XEXP (operands[1], 0), 0))) &&
+#endif
+ GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT)
+ {
+ rtx symbol_ref = XEXP (XEXP (operands[1], 0), 0);
+ rtx const_int = XEXP (XEXP (operands[1], 0), 1);
+ rtx temp = gen_reg_rtx (Pmode);
+ emit_move_insn (temp, symbol_ref);
+ emit_move_insn (operands[0],
+ plus_constant_for_output (temp, INTVAL (const_int)));
+ DONE;
+ }
+}")
+
+(define_insn "movgensi"
[(set (match_operand:SI 0 "nonimmediate_operand" "=g")
(match_operand:SI 1 "general_operand" "g"))]
""
@@ -242,15 +266,21 @@
/* Make sure the reg hasn't been clobbered. */
&& ! reg_set_between_p (operands[0], XEXP (link, 0), insn))
return \"incl %0\";
- if (GET_CODE (operands[1]) == SYMBOL_REF || GET_CODE (operands[1]) == CONST)
+ if (GET_CODE (operands[1]) == SYMBOL_REF
+ || GET_CODE (operands[1]) == LABEL_REF
+ || GET_CODE (operands[1]) == CONST)
{
if (push_operand (operands[0], SImode))
return \"pushab %a1\";
return \"movab %a1,%0\";
}
if (operands[1] == const0_rtx)
- return \"clrl %0\";
- if ( ((GET_CODE (operands[1]) == CONST_INT) || (GET_CODE (operands[1]) == CONSTANT_P_RTX))
+ {
+ if (push_operand (operands[0], SImode))
+ return \"pushl %1\";
+ return \"clrl %0\";
+ }
+ if ( ((GET_CODE (operands[1]) == CONST_INT) || (GET_CODE (operands[1]) == CONSTANT_P_RTX))
&& (unsigned) INTVAL (operands[1]) >= 64)
{
int i = INTVAL (operands[1]);
@@ -1928,7 +1958,9 @@
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "jgtru %l0")
+ "*
+ OUTPUT_JUMP(\"jgtru %l0\", 0, \"jneq %l0\");
+ ")
(define_insn "blt"
[(set (pc)
@@ -1946,7 +1978,9 @@
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "jlssu %l0")
+ "*
+ OUTPUT_JUMP(\"jlssu %l0\", 0, 0);
+ ")
(define_insn "bge"
[(set (pc)
@@ -1964,7 +1998,9 @@
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "jgequ %l0")
+ "*
+ OUTPUT_JUMP(\"jgequ %l0\", 0, 0);
+ ")
(define_insn "ble"
[(set (pc)
@@ -1982,10 +2018,12 @@
(label_ref (match_operand 0 "" ""))
(pc)))]
""
- "jlequ %l0")
+ "*
+ OUTPUT_JUMP(\"jlequ %l0\", NULL, \"jeql %l0\");
+ ")
;; Recognize reversed jumps.
-(define_insn ""
+(define_insn "*rbr"
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(cc0)
@@ -1993,7 +2031,19 @@
(pc)
(label_ref (match_operand 1 "" ""))))]
""
- "j%C0 %l1") ; %C0 negates condition
+ "*
+ if ((cc_status.flags & CC_NO_OVERFLOW) != 0)
+ {
+ if (GET_CODE (operands[0]) == LTU
+ || GET_CODE (operands[0]) == GEU)
+ fatal (\"Cannot reverse branch\");
+ if (GET_CODE (operands[0]) == GTU)
+ return \"jeql %l0\";
+ if (GET_CODE (operands[0]) == LEU)
+ return \"jneq %l0\";
+ }
+ return \"j%C0 %l1\"; /* %C0 negates condition */
+ ")
;; Recognize jbs, jlbs, jbc and jlbc instructions. Note that the operand
;; of jlbs and jlbc insns are SImode in the hardware. However, if it is
@@ -2166,63 +2216,66 @@
;; It is used in the call instruction as a byte, but in the addl2 as
;; a word. Since the only time we actually use it in the call instruction
;; is when it is a constant, SImode (for addl2) is the proper mode.
-(define_insn "call_pop"
+(define_expand "call_pop"
+ [(parallel [(call (match_operand:QI 0 "memory_operand" "")
+ (match_operand:SI 1 "const_int_operand" ""))
+ (set (reg:SI 14)
+ (plus:SI (reg:SI 14)
+ (match_operand:SI 3 "immediate_operand" "")))])]
+ ""
+ "
+{
+ if (INTVAL (operands[1]) > 255 * 4)
+ abort ();
+ operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4);
+}")
+
+(define_insn "*call_pop"
[(call (match_operand:QI 0 "memory_operand" "m")
(match_operand:SI 1 "const_int_operand" "n"))
(set (reg:SI 14) (plus:SI (reg:SI 14)
- (match_operand:SI 3 "immediate_operand" "i")))]
+ (match_operand:SI 2 "immediate_operand" "i")))]
""
- "*
- if (INTVAL (operands[1]) > 255 * 4)
- /* Vax `calls' really uses only one byte of #args, so pop explicitly. */
- return \"calls $0,%0\;addl2 %1,sp\";
- operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4);
- return \"calls %1,%0\";
-")
+ "calls %1,%0")
-(define_insn "call_value_pop"
- [(set (match_operand 0 "" "=g")
+(define_expand "call_value_pop"
+ [(parallel [(set (match_operand 0 "" "")
+ (call (match_operand:QI 1 "memory_operand" "")
+ (match_operand:SI 2 "const_int_operand" "")))
+ (set (reg:SI 14)
+ (plus:SI (reg:SI 14)
+ (match_operand:SI 4 "immediate_operand" "")))])]
+ ""
+ "
+{
+ if (INTVAL (operands[2]) > 255 * 4)
+ abort ();
+ operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4);
+}")
+
+(define_insn "*call_value_pop"
+ [(set (match_operand 0 "" "")
(call (match_operand:QI 1 "memory_operand" "m")
(match_operand:SI 2 "const_int_operand" "n")))
(set (reg:SI 14) (plus:SI (reg:SI 14)
- (match_operand:SI 4 "immediate_operand" "i")))]
+ (match_operand:SI 3 "immediate_operand" "i")))]
""
- "*
- if (INTVAL (operands[2]) > 255 * 4)
- /* Vax `calls' really uses only one byte of #args, so pop explicitly. */
- return \"calls $0,%1\;addl2 %2,sp\";
- operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4);
- return \"calls %2,%1\";
-")
+ "calls %2,%1")
-;; Define another set of these for the case of functions with no
-;; operands. In that case, combine may simplify the adjustment of sp.
-(define_insn ""
+;; Define another set of these for the case of functions with no operands.
+;; These will allow the optimizers to do a slightly better job.
+(define_insn "call"
[(call (match_operand:QI 0 "memory_operand" "m")
- (match_operand:SI 1 "const_int_operand" "n"))
- (set (reg:SI 14) (reg:SI 14))]
+ (const_int 0))]
""
- "*
- if (INTVAL (operands[1]) > 255 * 4)
- /* Vax `calls' really uses only one byte of #args, so pop explicitly. */
- return \"calls $0,%0\;addl2 %1,sp\";
- operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4);
- return \"calls %1,%0\";
-")
+ "calls $0,%0")
-(define_insn ""
- [(set (match_operand 0 "" "=g")
+(define_insn "call_value"
+ [(set (match_operand 0 "" "")
(call (match_operand:QI 1 "memory_operand" "m")
- (match_operand:SI 2 "const_int_operand" "n")))
- (set (reg:SI 14) (reg:SI 14))]
+ (const_int 0)))]
""
- "*
- if (INTVAL (operands[2]) > 255 * 4)
- /* Vax `calls' really uses only one byte of #args, so pop explicitly. */
- return \"calls $0,%1\;addl2 %2,sp\";
- operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4);
- return \"calls %2,%1\";
-")
+ "calls $0,%1")
;; Call subroutine returning any type.
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