[Linux-mips-commits]CVS: linux/arch/mips/au1000/pb1500 pci_ops.c,1.4,1.5

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500
In directory usw-pr-cvs1:/tmp/cvs-serv9978/arch/mips/au1000/pb1500

Modified Files:
	pci_ops.c 
Log Message:
Added support for all devsel devices. Patch by David Gathright.


Index: pci_ops.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1500/pci_ops.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- pci_ops.c	1 May 2002 18:00:30 -0000	1.4
+++ pci_ops.c	9 Nov 2002 01:54:50 -0000	1.5
@@ -6,6 +6,8 @@
  * Author: MontaVista Software, Inc.
  *         	pp...@mv... or so...@mv...
  *
+ *  Support for all devices (greater than 16) added by David Gathright.
+ *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
  *  Free Software Foundation;  either version 2 of the  License, or (at your
@@ -67,59 +69,45 @@
 extern struct pci_ops pb1500_pci_ops;
 
 struct pci_channel mips_pci_channels[] = {
-	{&pb1500_pci_ops, &pci_io_resource, &pci_mem_resource, (10<<3),(16<<3)},
+	{&pb1500_pci_ops, &pci_io_resource, &pci_mem_resource, (0<<3),(19<<3)},
 	{(struct pci_ops *) NULL, (struct resource *) NULL,
 	 (struct resource *) NULL, (int) NULL, (int) NULL}
 };
 
-static unsigned long cfg_addr, cfg_addr_type1;
 static int config_access(unsigned char access_type, struct pci_dev *dev, 
 			 unsigned char where, u32 * data)
 {
 	unsigned char bus = dev->bus->number;
 	unsigned int dev_fn = dev->devfn;
-	unsigned int device, function;
+	unsigned int device = PCI_SLOT(dev_fn);
+	unsigned int function = PCI_FUNC(dev_fn);
 	unsigned long config, status;
-	static int first = 1;
-
-	/* 
- 	 * 7:3 = slot
- 	 * 2:0 = function
-	 */
-
-	if (first) {
-		first = 0;
-		cfg_addr = ioremap(Au1500_EXT_CFG, 0x10000000);
-		if (!cfg_addr) 
-			panic (KERN_ERR "PCI unable to ioremap cfg space\n");
-
-		cfg_addr_type1 = ioremap(Au1500_EXT_CFG_TYPE1, 0x10000000);
-		if (!cfg_addr_type1)  {
-			panic (KERN_ERR "PCI unable to ioremap cfg space\n");
-		}
-	}
-
-	device = (dev_fn >> 3) & 0x1f;
-	function = dev_fn & 0x7;
+        unsigned long cfg_addr;
 
-	if (device > 16) {
+	if (device > 19) {
 		*data = 0xffffffff;
 		return -1;
 	}
 
-	au_writel(((0x2000 << 16) | (au_readl(Au1500_PCI_STATCMD) & 0xffff)),
+	au_writel(((0x2000 << 16) | (au_readl(Au1500_PCI_STATCMD) & 0xffff)), 
 			Au1500_PCI_STATCMD);
 	//au_writel(au_readl(Au1500_PCI_CFG) & ~PCI_ERROR, Au1500_PCI_CFG);
 	au_sync_udelay(1);
 
-	/* setup the lower 31 bits of the 36 bit address */
-	if (bus == 0) {
-		config = cfg_addr | 
-			((1<<device)<<11) | (function << 8) | (where & ~0x3);
-	} else {
-		config = cfg_addr_type1 | (bus<<16) | (device<<11) | 
-			(function << 8) | (where & ~0x3);
-	}
+        /* setup the config window */
+        if (bus == 0) {
+                cfg_addr = ioremap( Au1500_EXT_CFG | ((1<<device)<<11) , 
+				0x00100000);
+        } else {
+                cfg_addr = ioremap( Au1500_EXT_CFG_TYPE1 | (bus<<16) | 
+				(device<<11), 0x00100000);
+        }
+
+        if (!cfg_addr)
+                panic (KERN_ERR "PCI unable to ioremap cfg space\n");
+
+        /* setup the lower bits of the 36 bit address */
+        config = cfg_addr | (function << 8) | (where & ~0x3);
 
 #if 0
 	printk("cfg access: config %x, dev_fn %x, device %x function %x\n",
@@ -133,11 +121,18 @@
 	}
 	au_sync_udelay(2);
 
+
 	DBG("config_access: %d bus %d device %d at %x *data %x, conf %x\n", 
 			access_type, bus, device, where, *data, config);
 
+        /* unmap io space */
+        iounmap( cfg_addr );
+
 	/* check master abort */
 	status = au_readl(Au1500_PCI_STATCMD);
+#if 0
+printk("cfg access: status %x, data %x\n", status, *data );
+#endif
 	if (status & (1<<29)) { 
 		*data = 0xffffffff;
 		return -1;
@@ -145,8 +140,7 @@
 		DBG("PCI ERR detected: status %x\n", status);
 		*data = 0xffffffff;
 		return -1;
-	}
-	else {
+	} else {
 		return PCIBIOS_SUCCESSFUL;
 	}
 }