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[Linux-mips-commits]CVS: linux/drivers/video Config.in,1.19,1.20 au1100fb.c,1.7,1.8 au1100fb.h,1.5,1.6
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From: Pete P. <pp...@us...> - 2002-09-25 07:39:03
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Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv13662/drivers/video
Modified Files:
Config.in au1100fb.c au1100fb.h
Log Message:
Au updates and Hydrogen Board support.
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- Config.in 27 Jun 2002 21:13:06 -0000 1.19
+++ Config.in 25 Sep 2002 07:38:59 -0000 1.20
@@ -134,6 +134,9 @@
if [ "$CONFIG_FB_ATY" != "n" ]; then
bool ' Mach64 GX support (EXPERIMENTAL)' CONFIG_FB_ATY_GX
bool ' Mach64 CT/VT/GT/LT (incl. 3D RAGE) support' CONFIG_FB_ATY_CT
+ if [ "$CONFIG_FB_ATY_CT" != "n" ]; then
+ bool ' Rage XL No-BIOS Init support' CONFIG_FB_ATY_XL_INIT
+ fi
fi
tristate ' ATI Radeon display support (EXPERIMENTAL)' CONFIG_FB_RADEON
tristate ' ATI Rage128 display support (EXPERIMENTAL)' CONFIG_FB_ATY128
@@ -161,6 +164,9 @@
fi
if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
+ fi
+ if [ "$CONFIG_MIPS_HYD1100" = "y" ]; then
+ bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
fi
fi
tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181
Index: au1100fb.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/au1100fb.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- au1100fb.c 1 May 2002 18:00:31 -0000 1.7
+++ au1100fb.c 25 Sep 2002 07:38:59 -0000 1.8
@@ -61,7 +61,8 @@
* Sanity check. If this is a new Au1100 based board, search for
* the PB1100 ifdefs to make sure you modify the code accordingly.
*/
-#ifndef CONFIG_MIPS_PB1100
+#if defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_HYD1100)
+#else
error Unknown Au1100 board
#endif
@@ -318,8 +319,15 @@
p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
PB1100_G_CONTROL);
- au_sync();
#endif
+#ifdef CONFIG_MIPS_HYD1100
+ // Set to MAX high time on PWM
+ writel(0xfff,0xb5000028);
+ //DWPFIX is this the write PWM?
+ writel(0x1fff,0xb5000024);
+ writel(1<<23,0xb190010c);
+#endif
+ au_sync();
break;
case VESA_VSYNC_SUSPEND:
@@ -328,11 +336,17 @@
/* turn off panel */
//printk("turn off panel\n");
#ifdef CONFIG_MIPS_PB1100
- p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
au_writew(au_readw(PB1100_G_CONTROL) & ~p_lcd->mode_backlight,
PB1100_G_CONTROL);
- au_sync();
+ p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
+#endif
+#ifdef CONFIG_MIPS_HYD1100X
+ writel(0,0xb5000028);
+ writel(0,0xb5000024);
+ writel(0<<23,0xb190010c);
+ p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
#endif
+ au_sync();
break;
default:
break;
@@ -395,7 +409,8 @@
vma->vm_pgoff = off >> PAGE_SHIFT;
pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
- pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
+ //pgprot_val(vma->vm_page_prot) |= _CACHE_CACHABLE_NONCOHERENT;
+ pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6
/* This is an IO map - tell maydump to skip this VMA */
vma->vm_flags |= VM_IO;
@@ -472,12 +487,21 @@
p_lcd_reg->lcd_words = words - 1;
p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys;
-#ifdef CONFIG_MIPS_PB1100
/* turn on panel */
+#ifdef CONFIG_MIPS_PB1100
au_writew(au_readw(PB1100_G_CONTROL) | p_lcd->mode_backlight,
PB1100_G_CONTROL);
- p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
#endif
+#ifdef CONFIG_MIPS_HYD1100
+#ifdef CONFIG_MIPS_HYD1100
+ // Set to MAX high time on PWM
+ writel(0xfff,0xb5000028);
+ //DWPFIX is this the write PWM?
+ writel(0x1fff,0xb5000024);
+ writel(1<<23,0xb190010c);
+#endif
+#endif
+ p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
return 0;
}
@@ -612,6 +636,19 @@
for(this_opt=strtok(options, ","); this_opt;
this_opt=strtok(NULL, ",")) {
if (!strncmp(this_opt, "panel:", 6)) {
+#ifdef CONFIG_MIPS_PB1100
+ /* Read Pb1100 Switch S10 ? */
+ if (!strncmp(this_opt+6, "s10", 3))
+ {
+ int panel;
+ panel = *(volatile int *)0xAE000008; /* BCSR SWITCHES */
+ panel >>= 8;
+ panel &= 0x0F;
+ if (panel >= num_panels) panel = 0;
+ my_lcd_index = panel;
+ }
+ else
+#endif
/* Get the panel name, everything else if fixed */
for (i=0; i<num_panels; i++) {
if (!strncmp(this_opt+6, panels[i].panel_name,
@@ -626,6 +663,9 @@
fb_info.nohwcursor = 1;
}
}
+
+ printk("au1100fb: Panel %d %s\n", my_lcd_index,
+ panels[my_lcd_index].panel_name);
}
Index: au1100fb.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/au1100fb.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- au1100fb.h 15 May 2002 16:53:54 -0000 1.5
+++ au1100fb.h 25 Sep 2002 07:38:59 -0000 1.6
@@ -191,7 +191,7 @@
*/
struct known_lcd_panels panels[] =
{
- { /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */
+ { /* 0: Pb1100 LCDA: Sharp 320x240x16bpp TFT panel, no rotate */
320, /* xres */
240, /* yres */
16, /* bpp */
@@ -206,6 +206,60 @@
/*LCD_CONTROL_DB*/
/*LCD_CONTROL_CCO*/
/*LCD_CONTROL_DP*/
+ | LCD_CONTROL_PO_00
+ /*LCD_CONTROL_MPI*/
+ | LCD_CONTROL_PT
+ | LCD_CONTROL_PC
+ | LCD_CONTROL_BPP_16 ),
+
+ /* mode_horztiming */
+ ( LCD_HORZTIMING_HN2_N(8)
+ | LCD_HORZTIMING_HN1_N(60)
+ | LCD_HORZTIMING_HPW_N(12)
+ | LCD_HORZTIMING_PPL_N(320) ),
+
+ /* mode_verttiming */
+ ( LCD_VERTTIMING_VN2_N(5)
+ | LCD_VERTTIMING_VN1_N(17)
+ | LCD_VERTTIMING_VPW_N(1)
+ | LCD_VERTTIMING_LPP_N(240) ),
+
+ /* mode_clkcontrol */
+ ( 0
+ /*LCD_CLKCONTROL_IB*/
+ /*LCD_CLKCONTROL_IC*/
+ /*LCD_CLKCONTROL_IH*/
+ /*LCD_CLKCONTROL_IV*/
+ | LCD_CLKCONTROL_PCD_N(1) ),
+
+ /* mode_pwmdiv */
+ 0,
+
+ /* mode_pwmhi */
+ 0,
+
+ /* mode_toyclksrc */
+ ((1<<7) | (1<<6) | (1<<5)),
+
+ /* mode_backlight */
+ 6
+ },
+
+ { /* 1: Pb1100 LCDA: Sharp 320x240x16bpp TFT panel, rotated */
+ 240, /* xres */
+ 320, /* yres */
+ 16, /* bpp */
+
+ "Sharp_320x240_16",
+ /* mode_control */
+ ( LCD_CONTROL_SBPPF_565
+ /*LCD_CONTROL_WP*/
+ /*LCD_CONTROL_WD*/
+ | LCD_CONTROL_C
+ | LCD_CONTROL_SM_0
+ /*LCD_CONTROL_DB*/
+ /*LCD_CONTROL_CCO*/
+ /*LCD_CONTROL_DP*/
| LCD_DEFAULT_PIX_FORMAT
/*LCD_CONTROL_MPI*/
| LCD_CONTROL_PT
@@ -245,7 +299,39 @@
6
},
- { /* 1: Pb1100 LCDC 640x480 TFT panel */
+ { /* 2: Pb1100 LCDB 640x480x16bpp PrimeView TFT panel */
+ 640, /* xres */
+ 480, /* yres */
+ 16, /* bpp */
+
+ "Primeview_640x480_16",
+
+ /* mode_control */
+ 0x0004886a,
+
+ /* mode_horztiming */
+ 0x0e4bfe7f,
+
+ /* mode_verttiming */
+ 0x210805df,
+
+ /* mode_clkcontrol */
+ 0x00038001,
+
+ /* mode_pwmdiv */
+ 0,
+
+ /* mode_pwmhi */
+ 0,
+
+ /* mode_toyclksrc */
+ ((1<<7) | (1<<6) | (0<<5)),
+
+ /* mode_backlight */
+ 7
+ },
+
+ { /* 3: Pb1100 LCDC 640x480x16bpp TFT panel */
640, /* xres */
480, /* yres */
16, /* bpp */
@@ -253,7 +339,11 @@
"Generic_640x480_16",
/* mode_control */
+#ifdef CONFIG_MIPS_HYD1100
+ 0x0004c15a,
+#else
0x004806a | LCD_DEFAULT_PIX_FORMAT,
+#endif
/* mode_horztiming */
0x3434d67f,
@@ -282,24 +372,31 @@
7
},
- { /* 2: Pb1100 LCDB 640x480 PrimeView TFT panel */
+ { // 4: Pb1100 NEON: 640x480x16bpp CRT, HOG, Hsync 30.7 kHz, Vsync 57.7 Hz
640, /* xres */
480, /* yres */
- 16, /* bpp */
+ 16, /* bpp */
- "PrimeView_640x480_16",
+ "NEON_640x480_16",
/* mode_control */
0x0004886a | LCD_DEFAULT_PIX_FORMAT,
- /* mode_horztiming */
- 0x0e4bfe7f,
+ // mode_horztiming
+ // 15 pixels front porch
+ // 76 pixels back porch
+ // 64 pixels sync pulse
+ 0x1e3bfe7f,
- /* mode_verttiming */
+ // mode_verttiming
+ // 34 lines front porch
+ // 9 lines back porch
+ // 2 lines sync pulse
0x210805df,
/* mode_clkcontrol */
- 0x00038001,
+ // div to 24 MHz
+ 0x00020001,
/* mode_pwmdiv */
0,
@@ -308,13 +405,14 @@
0,
/* mode_toyclksrc */
+ // use 48 MHz clock
((1<<7) | (1<<6) | (0<<5)),
/* mode_backlight */
7
},
- { /* 3: Pb1100 800x600x16bpp NEON CRT */
+ { //5: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
800, /* xres */
600, /* yres */
16, /* bpp */
@@ -324,13 +422,20 @@
/* mode_control */
0x0004886A | LCD_DEFAULT_PIX_FORMAT,
- /* mode_horztiming */
- 0x005AFF1F,
+ // mode_horztiming
+ // 32 pixels front porch
+ // 152 pixels back porch
+ // 64 pixels sync pulse
+ 0x1F97FF1F,
- /* mode_verttiming */
- 0x16000E57,
+ // mode_verttiming
+ // 37 lines front porch
+ // 23 lines back porch
+ // 6 lines sync pulse
+ 0x24161A57,
/* mode_clkcontrol */
+ // keep at 47 MHz
0x00020000,
/* mode_pwmdiv */
@@ -340,13 +445,14 @@
0,
/* mode_toyclksrc */
+ // use 48 MHz clock
((1<<7) | (1<<6) | (0<<5)),
-
+
/* mode_backlight */
7
},
- { /* 4: Pb1100 640x480x16bpp NEON CRT */
+ { //6: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
640, /* xres */
480, /* yres */
16, /* bpp */
@@ -356,13 +462,20 @@
/* mode_control */
0x0004886A | LCD_DEFAULT_PIX_FORMAT,
- /* mode_horztiming */
- 0x0052E27F,
+ // mode_horztiming
+ // 32 pixels front porch
+ // 152 pixels back porch
+ // 64 pixels sync pulse
+ 0x1F97FF1F,
- /* mode_verttiming */
- 0x18000DDF,
+ // mode_verttiming
+ // 37 lines front porch
+ // 23 lines back porch
+ // 6 lines sync pulse
+ 0x24161A57,
/* mode_clkcontrol */
+ // keep at 47 MHz
0x00020000,
/* mode_pwmdiv */
@@ -372,10 +485,54 @@
0,
/* mode_toyclksrc */
+ // use 48 MHz clock
((1<<7) | (1<<6) | (0<<5)),
+
+ /* mode_backlight */
+ 7
+ },
+ { //7: Pb1100 NEON: 800x600x16bpp CRT, HOG, Hsync 45.7 kHz, Vsync 68.7 Hz
+ 800, /* xres */
+ 600, /* yres */
+ 16, /* bpp */
+
+ "NEON_800x600_16",
+
+
+ /* mode_control */
+ 0x0004886A,
+
+ // mode_horztiming
+ // 32 pixels front porch
+ // 152 pixels back porch
+ // 64 pixels sync pulse
+ 0x1F97FF1F,
+
+ // mode_verttiming
+ // 37 lines front porch
+ // 23 lines back porch
+ // 6 lines sync pulse
+ 0x24161A57,
+
+ /* mode_clkcontrol */
+ // keep at 47 MHz
+ 0x00020000,
+
+ /* mode_pwmdiv */
+ 0,
+
+ /* mode_pwmhi */
+ 0,
+
+ /* mode_toyclksrc */
+ // use 48 MHz clock
+ ((1<<7) | (1<<6) | (0<<5)),
+
/* mode_backlight */
7
},
+
+
};
#endif /* _AU1100LCD_H */
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