[Linux-mips-commits]CVS: linux/arch/mips/vr41xx/vr4122/common Makefile,1.1,1.2 dbg_io.c,1.1,1.2 pciu.c,1.3,1.4 pciu.h,1.1,1.2 bcu.c,1.2,NONE cmu.c,1.1,NONE icu.c,1.2,NONE icu.h,1.1,NONE siu.c,1.1,NONE siu.h,1.1,NONE

[Paul M. <le...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common
In directory usw-pr-cvs1:/tmp/cvs-serv32248/arch/mips/vr41xx/vr4122/common

Modified Files:
	Makefile dbg_io.c pciu.c pciu.h 
Removed Files:
	bcu.c cmu.c icu.c icu.h siu.c siu.h 
Log Message:
Merge yoichi-san's vr41xx patch. Still some cleanups needed..



Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Makefile	7 Mar 2002 03:16:54 -0000	1.1
+++ Makefile	12 Jul 2002 20:14:28 -0000	1.2
@@ -21,7 +21,6 @@
 O_TARGET := vr4122.o
 
 export-objs	:= vrc4173.o
-obj-y		:= bcu.o cmu.o icu.o siu.o
 
 obj-$(CONFIG_PCI)		+= pciu.o
 obj-$(CONFIG_VRC4173)		+= vrc4173.o

Index: dbg_io.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common/dbg_io.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- dbg_io.c	7 Mar 2002 03:16:54 -0000	1.1
+++ dbg_io.c	12 Jul 2002 20:14:28 -0000	1.2
@@ -40,7 +40,7 @@
 
 /* [stevel] we use the IT8712 serial port for kgdb */
 #define	DEBUG_BASE  0xAF000820 /* Vr4122 DSIU base address */
-#define MAX_BAUD    115200
+#define MAX_BAUD    1152000
 
 /* === END OF CONFIG === */
 
@@ -109,7 +109,7 @@
 {
     if (!remoteDebugInitialized) {
 	remoteDebugInitialized = 1;
-	debugInit(UART16550_BAUD_115200,
+	debugInit(UART16550_BAUD_38400,
 		  UART16550_DATA_8BIT,
 		  UART16550_PARITY_NONE,
 		  UART16550_STOP_1BIT);
@@ -124,7 +124,7 @@
 {
     if (!remoteDebugInitialized) {
 	remoteDebugInitialized = 1;
-	debugInit(UART16550_BAUD_115200,
+	debugInit(UART16550_BAUD_38400,
 		  UART16550_DATA_8BIT,
 		  UART16550_PARITY_NONE,
 		  UART16550_STOP_1BIT);

Index: pciu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common/pciu.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- pciu.c	21 Apr 2002 06:44:03 -0000	1.3
+++ pciu.c	12 Jul 2002 20:14:28 -0000	1.4
@@ -44,7 +44,9 @@
 #include <linux/types.h>
 #include <linux/delay.h>
 
+#include <asm/cpu.h>
 #include <asm/io.h>
+#include <asm/pci_channel.h>
 #include <asm/vr41xx.h>
 
 #include "pciu.h"
@@ -191,13 +193,27 @@
 	vr41xx_pci_write_config_dword
 };
 
-void __init vr41xx_pciu_init(void)
+void __init vr41xx_pciu_init(struct vr41xx_pci_address_map *map)
 {
+	struct vr41xx_pci_address_space *s;
+	u32 config;
 	int n;
 
+	if (!map)
+		return;
+
 	/* Disable PCI interrupt */
 	writew(0, MPCIINTREG);
 
+	/* Supply VTClock to PCIU */
+	vr41xx_clock_supply(PCIU_CLOCK);
+
+	/*
+	 * Sleep for 1us after setting MSKPPCIU bit in CMUCLKMSK
+	 * before doing any PCIU access to avoid deadlock on VR4131.
+	 */
+	udelay(1);
+
 	/* Select PCI clock */
 	if (vr41xx_vtclock < MAX_PCI_CLOCK)
 		writel(EQUAL_VTCLOCK, PCICLKSELREG);
@@ -211,16 +227,31 @@
 	/* Supply PCI clock by PCI bus */
 	vr41xx_clock_supply(PCI_CLOCK);
 
-	/* 
-	 * Sleep for 1us after setting MSKPPCIU bit in CMUCLKMSK
-	 * before doing any PCIU access to avoid deadlock on VR4131. 
+	/*
+	 * Set PCI memory & I/O space address conversion registers
+	 * for master transaction.
 	 */
-	udelay(1);
-
-	/* Set master memory & I/O windows */
-	writel(0x100f9010, PCIMMAW1REG);
-	writel(0x140fd014, PCIMMAW2REG);
-	writel(0x160fd000, PCIMIOAWREG);
+	if (map->mem1 != NULL) {
+		s = map->mem1;
+		config = (s->internal_base & 0xff000000) |
+		         ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) |
+		         ((s->pci_base & 0xff000000) >> 24);
+		writel(config, PCIMMAW1REG);
+	}
+	if (map->mem2 != NULL) {
+		s = map->mem2;
+		config = (s->internal_base & 0xff000000) |
+		         ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) |
+		         ((s->pci_base & 0xff000000) >> 24);
+		writel(config, PCIMMAW2REG);
+	}
+	if (map->io != NULL) {
+		s = map->io;
+		config = (s->internal_base & 0xff000000) |
+		         ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) |
+		         ((s->pci_base & 0xff000000) >> 24);
+		writel(config, PCIMIOAWREG);
+	}
 
 	/* Set target memory windows */
 	writel(0x00081000, PCITAW1REG);
@@ -231,8 +262,13 @@
 	/* Clear bus error */
 	n = readl(BUSERRADREG);
 
-	writel(100, PCITRDYVREG);
-	pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x00008004);
+	if (mips_cpu.cputype == CPU_VR4122) {
+		writel(0UL, PCITRDYVREG);
+		pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x0000f804);
+	} else {
+		writel(100UL, PCITRDYVREG);
+		pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x00008004);
+	}
 
 	writel(CONFIG_DONE, PCIENREG);
 	pciu_write_config_dword(PCI_COMMAND,

Index: pciu.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/vr4122/common/pciu.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- pciu.h	7 Mar 2002 03:16:54 -0000	1.1
+++ pciu.h	12 Jul 2002 20:14:28 -0000	1.2
@@ -107,6 +107,7 @@
 
 #define MAX_PCI_CLOCK			33333333
 
+#define PCIU_CLOCK			0x0080
 #define PCI_CLOCK			0x2000
 
 static inline int pciu_read_config_byte(int where, u8 *val)

--- bcu.c DELETED ---

--- cmu.c DELETED ---

--- icu.c DELETED ---

--- icu.h DELETED ---

--- siu.c DELETED ---

--- siu.h DELETED ---