[Linux-mips-commits]CVS: linux/include/asm-mips/vr41xx capcella.h,NONE,1.1 eagle.h,1.2,1.3 mp-c303.h,1.2,1.3

[Paul M. <le...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips/vr41xx
In directory usw-pr-cvs1:/tmp/cvs-serv32248/include/asm-mips/vr41xx

Modified Files:
	eagle.h mp-c303.h 
Added Files:
	capcella.h 
Log Message:
Merge yoichi-san's vr41xx patch. Still some cleanups needed..



--- NEW FILE: capcella.h ---
/*
 * FILE NAME
 *	include/asm-mips/vr41xx/capcella.h
 *
 * BRIEF MODULE DESCRIPTION
 *	Include file for ZAO Networks Capcella.
 *
 * Copyright 2002 Yoichi Yuasa
 *                yu...@hh...
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the
 *  Free Software Foundation; either version 2 of the License, or (at your
 *  option) any later version.
 */
#ifndef __ZAO_CAPCELLA_H
#define __ZAO_CAPCELLA_H

#include <asm/addrspace.h>
#include <asm/vr41xx.h>

/*
 * Board specific address mapping
 */
#define VR41XX_PCI_MEM1_BASE		0x10000000
#define VR41XX_PCI_MEM1_SIZE		0x04000000
#define VR41XX_PCI_MEM1_MASK		0x7c000000

#define VR41XX_PCI_MEM2_BASE		0x14000000
#define VR41XX_PCI_MEM2_SIZE		0x02000000
#define VR41XX_PCI_MEM2_MASK		0x7e000000

#define VR41XX_PCI_IO_BASE		0x16000000
#define VR41XX_PCI_IO_SIZE		0x02000000
#define VR41XX_PCI_IO_MASK		0x7e000000

#define VR41XX_PCI_IO_START		0x01000000
#define VR41XX_PCI_IO_END		0x01ffffff

#define VR41XX_PCI_MEM_START		0x12000000
#define VR41XX_PCI_MEM_END		0x15ffffff

#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
#define IO_PORT_RESOURCE_START		0
#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)

/*
 * Interrupt Number
 */
#define RTL8139_1_IRQ			GIU_IRQ(4)
#define RTL8139_2_IRQ			GIU_IRQ(5)
#define PC104PLUS_INTA_IRQ		GIU_IRQ(2)
#define PC104PLUS_INTB_IRQ		GIU_IRQ(3)
#define PC104PLUS_INTC_IRQ		GIU_IRQ(4)
#define PC104PLUS_INTD_IRQ		GIU_IRQ(5)

#endif /* __ZAO_CAPCELLA_H */

Index: eagle.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/eagle.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- eagle.h	9 Mar 2002 01:50:46 -0000	1.2
+++ eagle.h	12 Jul 2002 20:14:28 -0000	1.3
@@ -39,11 +39,17 @@
 /*
  * Board specific address mapping
  */
-#define VR41XX_PCI_MEM_BASE		0x10000000
-#define VR41XX_PCI_MEM_SIZE		0x06000000
+#define VR41XX_PCI_MEM1_BASE		0x10000000
+#define VR41XX_PCI_MEM1_SIZE		0x04000000
+#define VR41XX_PCI_MEM1_MASK		0x7c000000
+
+#define VR41XX_PCI_MEM2_BASE		0x14000000
+#define VR41XX_PCI_MEM2_SIZE		0x02000000
+#define VR41XX_PCI_MEM2_MASK		0x7e000000
 
 #define VR41XX_PCI_IO_BASE		0x16000000
 #define VR41XX_PCI_IO_SIZE		0x02000000
+#define VR41XX_PCI_IO_MASK		0x7e000000
 
 #define VR41XX_PCI_IO_START		0x01000000
 #define VR41XX_PCI_IO_END		0x01ffffff
@@ -54,16 +60,26 @@
 #define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
 #define IO_PORT_RESOURCE_START		0
 #define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM_RESOURCE_START		VR41XX_PCI_MEM_BASE
-#define IO_MEM_RESOURCE_END		(VR41XX_PCI_MEM_BASE + VR41XX_PCI_MEM_SIZE)
+#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
+#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
+#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
+#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
+
+/*
+ * General-Purpose I/O Pin Number
+ */
+#define VRC4173_PIN			1
+#define PCISLOT_PIN			4
+#define PCIINT_PIN			5
+#define DCD_PIN				15
 
 /*
  * Interrupt Number
  */
-#define VRC4173_IRQ			GIUL_IRQ(1)
-#define PCISLOT_IRQ			GIUL_IRQ(4)
-#define PCIINT_IRQ			GIUL_IRQ(5)
-#define DCD_IRQ				GIUL_IRQ(15)
+#define VRC4173_IRQ			GIU_IRQ(VRC4173_PIN)
+#define PCISLOT_IRQ			GIU_IRQ(PCISLOT_PIN)
+#define PCIINT_IRQ			GIU_IRQ(PCIINT_PIN)
+#define DCD_IRQ				GIU_IRQ(DCD_PIN)
 
 #define PCIINT_IRQ_BASE			89
 #define CP_INTA_IRQ			(PCIINT_IRQ_BASE + 0)

Index: mp-c303.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx/mp-c303.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- mp-c303.h	9 Mar 2002 01:50:46 -0000	1.2
+++ mp-c303.h	12 Jul 2002 20:14:29 -0000	1.3
@@ -22,11 +22,17 @@
 /*
  * Board specific address mapping
  */
-#define VR41XX_PCI_MEM_BASE		0x10000000
-#define VR41XX_PCI_MEM_SIZE		0x06000000
+#define VR41XX_PCI_MEM1_BASE		0x10000000
+#define VR41XX_PCI_MEM1_SIZE		0x04000000
+#define VR41XX_PCI_MEM1_MASK		0x7c000000
+
+#define VR41XX_PCI_MEM2_BASE		0x14000000
+#define VR41XX_PCI_MEM2_SIZE		0x02000000
+#define VR41XX_PCI_MEM2_MASK		0x7e000000
 
 #define VR41XX_PCI_IO_BASE		0x16000000
 #define VR41XX_PCI_IO_SIZE		0x02000000
+#define VR41XX_PCI_IO_MASK		0x7e000000
 
 #define VR41XX_PCI_IO_START		0x01000000
 #define VR41XX_PCI_IO_END		0x01ffffff
@@ -37,12 +43,14 @@
 #define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
 #define IO_PORT_RESOURCE_START		0
 #define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM_RESOURCE_START		VR41XX_PCI_MEM_BASE
-#define IO_MEM_RESOURCE_END		(VR41XX_PCI_MEM_BASE + VR41XX_PCI_MEM_SIZE)
+#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
+#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
+#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
+#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
 
 /*
  * Interrupt Number
  */
-#define VRC4173_IRQ			GIUL_IRQ(1)
+#define VRC4173_IRQ			GIU_IRQ(1)
 
 #endif /* __VICTOR_MPC303_H */