[Linux-mips-commits]CVS: linux/arch/mips/mm c-mips32.c,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv29100/arch/mips/mm

Modified Files:
	c-mips32.c 
Log Message:
Updated Mips 64 to OSS tree.

Index: c-mips32.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-mips32.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- c-mips32.c	28 Jan 2002 23:15:25 -0000	1.4
+++ c-mips32.c	30 May 2002 20:42:08 -0000	1.5
@@ -17,6 +17,7 @@
  *
  * MIPS32 CPU variant specific MMU/Cache routines.
  */
+#include <linux/config.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -158,10 +159,6 @@
 	}
 }
 
-
-
-
-
 static void mips32_flush_cache_page_sc(struct vm_area_struct *vma,
 				    unsigned long page)
 {
@@ -413,6 +410,13 @@
 	protected_flush_icache_line(addr & ~(ic_lsize - 1));
 }
 
+static void mips32_flush_icache_all(void)
+{
+	if (mips_cpu.cputype == CPU_20KC) {
+		blast_icache();
+	}
+}
+
 /* Detect and size the various caches. */
 static void __init probe_icache(unsigned long config)
 {
@@ -665,6 +669,7 @@
 
 	_flush_cache_sigtramp = mips32_flush_cache_sigtramp;
 	_flush_icache_range = mips32_flush_icache_range;	/* Ouch */
+	_flush_icache_all = mips32_flush_icache_all;
 
 	__flush_cache_all();
 }