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[Linux-mips-commits]CVS: linux/arch/mips/kernel entry.S,1.15,1.16 head.S,1.14,1.15 irq_cpu.c,1.5,1.6 r2300_switch.S,1.4,1.5 r4k_switch.S,1.4,1.5
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From: Paul M. <le...@us...> - 2002-04-21 18:03:15
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Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv9425/arch/mips/kernel
Modified Files:
entry.S head.S irq_cpu.c r2300_switch.S r4k_switch.S
Log Message:
Sync with OSS.
Index: entry.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/entry.S,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -d -r1.15 -r1.16
--- entry.S 19 Jan 2002 21:17:35 -0000 1.15
+++ entry.S 21 Apr 2002 18:03:11 -0000 1.16
@@ -18,7 +18,7 @@
#include <asm/errno.h>
#include <asm/mipsregs.h>
#include <asm/page.h>
-#include <asm/pgtable.h>
+#include <asm/pgtable-bits.h>
#include <asm/stackframe.h>
#include <asm/processor.h>
#include <asm/regdef.h>
Index: head.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/head.S,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -d -r1.14 -r1.15
--- head.S 7 Mar 2002 09:15:16 -0000 1.14
+++ head.S 21 Apr 2002 18:03:11 -0000 1.15
@@ -257,20 +257,17 @@
.comm kernelsp, NR_CPUS * 8, 8
.comm pgd_current, NR_CPUS * 8, 8
-#undef PAGE_SIZE
-#define PAGE_SIZE 0x1000
-
.macro page name, order=0
.globl \name
-\name: .size \name, (PAGE_SIZE << \order)
- .org . + (PAGE_SIZE << \order)
+\name: .size \name, (_PAGE_SIZE << \order)
+ .org . + (_PAGE_SIZE << \order)
.type \name, @object
.endm
.data
.align 12
- page swapper_pg_dir, PGD_ORDER
+ page swapper_pg_dir, _PGD_ORDER
page empty_bad_page, 0
page empty_bad_page_table, 0
page invalid_pte_table, 0
Index: irq_cpu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/irq_cpu.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- irq_cpu.c 2 Jan 2002 18:10:40 -0000 1.5
+++ irq_cpu.c 21 Apr 2002 18:03:11 -0000 1.6
@@ -2,8 +2,6 @@
* Copyright 2001 MontaVista Software Inc.
* Author: Jun Sun, js...@mv... or js...@ju...
*
- * Copyright (C) 2001 Ralf Baechle
- *
* This file define the irq handler for MIPS CPU interrupts.
*
* This program is free software; you can redistribute it and/or modify it
@@ -15,51 +13,31 @@
/*
* Almost all MIPS CPUs define 8 interrupt sources. They are typically
* level triggered (i.e., cannot be cleared from CPU; must be cleared from
- * device). The first two are software interrupts which we don't really
- * use or support. The last one is usually cpu timer interrupt if a counter
- * register is present.
- *
- * Don't even think about using this on SMP. You have been warned.
+ * device). The first two are software interrupts. The last one is
+ * usually the CPU timer interrupt if counter register is present or, for
+ * CPUs with an external FPU, by convention it's the FPU exception interrupt.
*
* This file exports one global function:
- * mips_cpu_irq_init(u32 irq_base);
+ * void mips_cpu_irq_init(int irq_base);
*/
+#include <linux/init.h>
#include <linux/interrupt.h>
-#include <linux/types.h>
#include <linux/kernel.h>
+#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
-#include <asm/system.h>
-static int mips_cpu_irq_base;
-
-static inline void unmask_mips_irq(unsigned int irq)
-{
- clear_cp0_cause(0x100 << (irq - mips_cpu_irq_base));
- set_cp0_status(0x100 << (irq - mips_cpu_irq_base));
-}
-
-static inline void mask_mips_irq(unsigned int irq)
-{
- clear_cp0_status(0x100 << (irq - mips_cpu_irq_base));
-}
+static int mips_cpu_irq_base = -1;
-static inline void mips_cpu_irq_enable(unsigned int irq)
+static void mips_cpu_irq_enable(unsigned int irq)
{
- unsigned long flags;
-
- local_irq_save(flags);
- unmask_mips_irq(irq);
- local_irq_restore(flags);
+ clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
+ set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
}
static void mips_cpu_irq_disable(unsigned int irq)
{
- unsigned long flags;
-
- local_irq_save(flags);
- mask_mips_irq(irq);
- local_irq_restore(flags);
+ clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
}
static unsigned int mips_cpu_irq_startup(unsigned int irq)
@@ -71,26 +49,25 @@
#define mips_cpu_irq_shutdown mips_cpu_irq_disable
-/*
- * While we ack the interrupt interrupts are disabled and thus we don't need
- * to deal with concurrency issues. Same for mips_cpu_irq_end.
- */
static void mips_cpu_irq_ack(unsigned int irq)
{
- /* Only necessary for soft interrupts */
+ /* although we attemp to clear the IP bit in cause reigster, I think
+ * usually it is cleared by device (irq source)
+ */
clear_cp0_cause(1 << (irq - mips_cpu_irq_base + 8));
- mask_mips_irq(irq);
+ /* disable this interrupt - so that we safe proceed to the handler */
+ mips_cpu_irq_disable(irq);
}
static void mips_cpu_irq_end(unsigned int irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- unmask_mips_irq(irq);
+ if(!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ mips_cpu_irq_enable(irq);
}
static hw_irq_controller mips_cpu_irq_controller = {
- "CPU_irq",
+ "MIPS",
mips_cpu_irq_startup,
mips_cpu_irq_shutdown,
mips_cpu_irq_enable,
@@ -100,9 +77,10 @@
NULL /* no affinity stuff for UP */
};
-void mips_cpu_irq_init(u32 irq_base)
+
+void __init mips_cpu_irq_init(int irq_base)
{
- u32 i;
+ int i;
for (i = irq_base; i < irq_base + 8; i++) {
irq_desc[i].status = IRQ_DISABLED;
Index: r2300_switch.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/r2300_switch.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- r2300_switch.S 4 Jan 2002 18:04:53 -0000 1.4
+++ r2300_switch.S 21 Apr 2002 18:03:11 -0000 1.5
@@ -17,7 +17,7 @@
#include <asm/mipsregs.h>
#include <asm/offset.h>
#include <asm/page.h>
-#include <asm/pgtable.h>
+#include <asm/pgtable-bits.h>
#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
Index: r4k_switch.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/r4k_switch.S,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- r4k_switch.S 4 Jan 2002 18:04:53 -0000 1.4
+++ r4k_switch.S 21 Apr 2002 18:03:11 -0000 1.5
@@ -18,7 +18,7 @@
#include <asm/mipsregs.h>
#include <asm/offset.h>
#include <asm/page.h>
-#include <asm/pgtable.h>
+#include <asm/pgtable-bits.h>
#include <asm/processor.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
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