[Linux-mips-commits]CVS: linux/arch/mips/zboot/pb1xxx Makefile,NONE,1.1 head.S,NONE,1.1 ld.script,NONE,1.1

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/zboot/pb1xxx
In directory usw-pr-cvs1:/tmp/cvs-serv7014/pb1xxx

Added Files:
	Makefile head.S ld.script 
Log Message:
Consolidated zImage support for all three Alchemy boards (Pb1000, Pb1500,
Pb1100) into one directory.


--- NEW FILE: Makefile ---
# arch/mips/compressed/alchemy/Makefile
# 
# Makefile for Alchemy Semiconductor PB1500 board.
# All of the boot loader code was derived from the ppc
# boot code.
#
# Copyright 2001,2002 MontaVista Software Inc.
#
# Author: Mark A. Greer
#	  mg...@mv...
# Ported and modified for mips support by 
# Pete Popov <pp...@mv...>
#
# This program is free software; you can redistribute  it and/or modify it
# under  the terms of  the GNU General  Public License as published by the
# Free Software Foundation;  either version 2 of the  License, or (at your
# option) any later version.

.c.s:
	$(CC) $(CFLAGS) -S -o $*.s $<
.s.o:
	$(AS) -o $*.o $<
.c.o:
	$(CC) $(CFLAGS) -D__BOOTER__ -c -o $*.o $<
.S.s:
	$(CPP) $(AFLAGS) -o $*.o $<
.S.o:
	$(CC) $(AFLAGS) -c -o $*.o $<

#########################################################################
# START BOARD SPECIFIC VARIABLES
ifdef CONFIG_MIPS_PB1000
BNAME=pb1000
endif

ifdef CONFIG_MIPS_PB1100
BNAME=pb1100
endif

ifdef CONFIG_MIPS_PB1500
BNAME=pb1500
endif

# These two variables control where the zImage is stored
# in flash and loaded in memory. If you change either one,
# be sure to make the appropriate change to the zImage
# rule.
RAM_LOAD_ADDR = 0x81000000
FLASH_LOAD_ADDR = 0xBFD00000

# These two variables specify the free ram region
# that can be used for temporary malloc area
AVAIL_RAM_START=0x80400000
AVAIL_RAM_END=0x80800000

# This one must match the LOADADDR in arch/mips/Makefile!
LOADADDR=0x80100000
# END BOARD SPECIFIC VARIABLES
#########################################################################

ZLINKFLAGS = -T ld.script -Ttext $(RAM_LOAD_ADDR)

OBJECTS := head.o ../common/misc-common.o ../common/misc-simple.o \
	../common/au1k_uart.o ../common/string.o ../common/ctype.o
LIBS := ../lib/zlib.a

ENTRY := ../utils/entry
OFFSET := ../utils/offset
SIZE := ../utils/size

all: zImage

clean:
	rm -rf *.o vmlinux* zvmlinux.*

head.o: head.S $(TOPDIR)/vmlinux
	$(CC) -DFLASH_LOAD_ADDR=$(FLASH_LOAD_ADDR) $(AFLAGS) \
	-DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \
	-c -o $*.o $<

../common/misc-simple.o:
	$(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
		-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
		-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
		-DLOADADDR=$(LOADADDR) \
		-DZIMAGE_SIZE=0 -c -o $@ $*.c

# This is the first pass at building the boot loader image,
# without knowing the file offset where the vmlinuz.gz
# kernel will end up.  We build this image, check the offset,
# and then rebuild it with the correct offset and size
# passed to mips-simple.c
zvmlinux.no: $(OBJECTS) $(LIBS) ../images/vmlinux.gz
	$(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS)
	$(OBJCOPY) -R .comment \
		--add-section=image=../images/vmlinux.gz \
		$@.tmp $@
	# rm -f $@.tmp


# This is the final image we build, now that we know what
# the vmlinuz.gz offset is.
zvmlinux: $(OBJECTS) $(LIBS) ../images/vmlinux.gz zvmlinux.no
	$(CC) $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 \
		-DZIMAGE_OFFSET=$(shell sh $(OFFSET) $(OBJDUMP) $@.no image) \
		-DZIMAGE_SIZE=$(shell sh $(SIZE) $(OBJDUMP) $@.no image) \
		-D__BOOTER__ \
		-DAVAIL_RAM_START=$(AVAIL_RAM_START) \
		-DAVAIL_RAM_END=$(AVAIL_RAM_END) \
		-DLOADADDR=$(LOADADDR) \
		-c -o ../common/misc-simple.o ../common/misc-simple.c
	$(LD) $(ZLINKFLAGS) -o $@.tmp $(OBJECTS) $(LIBS)
	$(OBJCOPY) -R .comment \
		--add-section=image=../images/vmlinux.gz \
		$@.tmp $@
	$(OBJCOPY) --adjust-section-vma=image+$(RAM_LOAD_ADDR) $@
	$(OBJCOPY) --adjust-section-vma=image+$(shell sh $(OFFSET) \
	$(OBJDUMP) $@.no image ) $@
	# rm -f $@.tmp
	# rm -f $@.no


# Here we manipulate the image in order to get it the necessary
# srecord file we need.
zImage: zvmlinux
	mv zvmlinux ../images/$@.$(BNAME)
	$(OBJCOPY) --set-section-flags=image=alloc,load,code ../images/$@.$(BNAME)
	$(OBJCOPY) -O srec --adjust-vma 0x3ed00000 \
	../images/$@.$(BNAME) ../images/$@.$(BNAME).srec
	# rm ../images/vmlinux.gz

include $(TOPDIR)/Rules.make

--- NEW FILE: head.S ---
/*
 * arch/mips/kernel/head.S
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994, 1995 Waldorf Electronics
 * Written by Ralf Baechle and Andreas Busse
 * Copyright (C) 1995 - 1999 Ralf Baechle
 * Copyright (C) 1996 Paul M. Antoine
 * Modified for DECStation and hence R3000 support by Paul M. Antoine
 * Further modifications by David S. Miller and Harald Koerfgen
 * Copyright (C) 1999 Silicon Graphics, Inc.
 *
 * Head.S contains the MIPS exception handler and startup code.
 *
 **************************************************************************
 *  9 Nov, 2000.
 *  Added Cache Error exception handler and SBDDP EJTAG debug exception.
 *
 *  Kevin Kissell, ke...@mi... and Carsten Langgaard, car...@mi...
 *  Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
 **************************************************************************
 */
#include <linux/config.h>
#include <linux/threads.h>

#include <asm/asm.h>
#include <asm/cacheops.h>
#include <asm/mipsregs.h>
#include <asm/offset.h>
#include <asm/cachectl.h>
#include <asm/regdef.h>

#define IndexInvalidate_I       0x00

	.set noreorder
	.cprestore
	LEAF(start)
start:

locate:
	la	sp, .stack
	move	s0, a0
	move	s1, a1
	move	s2, a2
	move	s3, a3

	la	a0, start

	/* li	a1, 0xbfd00000 */
	li	a1, FLASH_LOAD_ADDR
	la	a2, _edata
	subu	t1, a2, a0
	srl	t1, t1, 2

	/* copy text section */
	li	t0, 0
1:	lw	v0, 0(a1)
	nop
	sw	v0, 0(a0)
	xor	t0, t0, v0
	addu	a0, 4
	bne	a2, a0, 1b
	addu	a1, 4

	/* Clear BSS */
	la	a0, _edata
	la	a2, _end
2:	sw	zero, 0(a0)
	bne	a2, a0, 2b
	addu	a0, 4

	/* flush the I-Cache */
	li	k0, 0x80000000  # start address
	li	k1, 0x80004000  # end address (16KB I-Cache)
	subu	k1, 128

1:
	.set mips3
	cache	IndexInvalidate_I, 0(k0)
	cache	IndexInvalidate_I, 32(k0)
	cache	IndexInvalidate_I, 64(k0)
	cache	IndexInvalidate_I, 96(k0)
	.set mips0

	bne	k0, k1, 1b
	addu	k0, k0, 128
	/* done */

	li	a0, FLASH_LOAD_ADDR  /* load address */
	move	a1, t1               /* length in words */
	move	a2, t0               /* checksum */
	move	a3, sp

	la	ra, 1f
	la	k0, decompress_kernel
	jr	k0
	nop
1:

	move	a0, s0
	move	a1, s1
	move	a2, s2
	move	a3, s3
	li	k0, KERNEL_ENTRY
	jr	k0
	nop
3:
	b 3b
	END(start)

	LEAF(udelay)
udelay:
	END(udelay)


	LEAF(FlushCache)
	li	k0, 0x80000000  # start address
	li	k1, 0x80004000  # end address (16KB I-Cache)
	subu	k1, 128

1:
	.set mips3
	cache	IndexInvalidate_I, 0(k0)
	cache	IndexInvalidate_I, 32(k0)
	cache	IndexInvalidate_I, 64(k0)
	cache	IndexInvalidate_I, 96(k0)
	.set mips0

	bne	k0, k1, 1b
	addu	k0, k0, 128
	jr	ra
	nop
	END(FlushCache)

	.comm .stack,4096*2,4

--- NEW FILE: ld.script ---
OUTPUT_ARCH(mips)
ENTRY(start)
SECTIONS
{
  /* Read-only sections, merged into text segment: */
  /* . = 0x81000000; */
  .init          : { *(.init)		} =0
  .text      :
  {
    _ftext = . ;
    *(.text)
    *(.rodata)
    *(.rodata1)
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
  } =0
  .kstrtab : { *(.kstrtab) }

  . = ALIGN(16);		/* Exception table */
  __start___ex_table = .;
  __ex_table : { *(__ex_table) }
  __stop___ex_table = .;

  __start___dbe_table = .;	/* Exception table for data bus errors */
  __dbe_table : { *(__dbe_table) }
  __stop___dbe_table = .;

  __start___ksymtab = .;	/* Kernel symbol table */
  __ksymtab : { *(__ksymtab) }
  __stop___ksymtab = .;

  _etext = .;

  . = ALIGN(8192);
  .data.init_task : { *(.data.init_task) }

  /* Startup code */
  . = ALIGN(4096);
  __init_begin = .;
  .text.init : { *(.text.init) }
  .data.init : { *(.data.init) }
  . = ALIGN(16);
  __setup_start = .;
  .setup.init : { *(.setup.init) }
  __setup_end = .;
  __initcall_start = .;
  .initcall.init : { *(.initcall.init) }
  __initcall_end = .;
  . = ALIGN(4096);	/* Align double page for init_task_union */
  __init_end = .;

  . = ALIGN(4096);
  .data.page_aligned : { *(.data.idt) }

  . = ALIGN(32);
  .data.cacheline_aligned : { *(.data.cacheline_aligned) }

  .fini      : { *(.fini)    } =0
  .reginfo : { *(.reginfo) }
  /* Adjust the address for the data segment.  We want to adjust up to
     the same address within the page on the next page up.  It would
     be more correct to do this:
       . = .;
     The current expression does not correctly handle the case of a
     text segment ending precisely at the end of a page; it causes the
     data segment to skip a page.  The above expression does not have
     this problem, but it will currently (2/95) cause BFD to allocate
     a single segment, combining both text and data, for this case.
     This will prevent the text segment from being shared among
     multiple executions of the program; I think that is more
     important than losing a page of the virtual address space (note
     that no actual memory is lost; the page which is skipped can not
     be referenced).  */
  . = .;
  .data    :
  {
    _fdata = . ;
    *(.data)

   /* Align the initial ramdisk image (INITRD) on page boundaries. */
   . = ALIGN(4096);
   __rd_start = .;
   *(.initrd)
   __rd_end = .;
   . = ALIGN(4096);

    CONSTRUCTORS
  }
  .data1   : { *(.data1) }
  _gp = . + 0x8000;
  .lit8 : { *(.lit8) }
  .lit4 : { *(.lit4) }
  .ctors         : { *(.ctors)   }
  .dtors         : { *(.dtors)   }
  .got           : { *(.got.plt) *(.got) }
  .dynamic       : { *(.dynamic) }
  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata     : { *(.sdata) }
  . = ALIGN(4);
  _edata  =  .;
  PROVIDE (edata = .);

  __bss_start = .;
  _fbss = .;
  .sbss      : { *(.sbss) *(.scommon) }
  .bss       :
  {
   *(.dynbss)
   *(.bss)
   *(COMMON)
   .  = ALIGN(4);
  _end = . ;
  PROVIDE (end = .);
  }

  /* Sections to be discarded */
  /DISCARD/ :
  {
        *(.text.exit)
        *(.data.exit)
        *(.exitcall.exit)
  }

  /* This is the MIPS specific mdebug section.  */
  .mdebug : { *(.mdebug) }
  /* These are needed for ELF backends which have not yet been
     converted to the new style linker.  */
  .stab 0 : { *(.stab) }
  .stabstr 0 : { *(.stabstr) }
  /* DWARF debug sections.
     Symbols in the .debug DWARF section are relative to the beginning of the
     section so we begin .debug at 0.  It's not clear yet what needs to happen
     for the others.   */
  .debug          0 : { *(.debug) }
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  .line           0 : { *(.line) }
  /* These must appear regardless of  .  */
  .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
  .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
  .comment : { *(.comment) }
  .note : { *(.note) }
}