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[Linux-mips-commits]CVS: linux/drivers/video au1100fb.c,NONE,1.1 au1100fb.h,NONE,1.1 Config.in,1.16,1.17 Makefile,1.13,1.14 fbmem.c,1.20,1.21
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From: Pete P. <pp...@us...> - 2002-04-10 01:10:16
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Update of /cvsroot/linux-mips/linux/drivers/video
In directory usw-pr-cvs1:/tmp/cvs-serv12747/drivers/video
Modified Files:
Config.in Makefile fbmem.c
Added Files:
au1100fb.c au1100fb.h
Log Message:
Au1100 fb driver. First pass only, there are still some things to be
done.
--- NEW FILE: au1100fb.c ---
/*
* BRIEF MODULE DESCRIPTION
* Au1100 LCD Driver.
*
* Copyright 2002 MontaVista Software
* Author: MontaVista Software, Inc.
* pp...@mv... or so...@mv...
*
* Copyright 2002 Alchemy Semiconductor
* Author: Alchemy Semiconductor
*
* Based on:
* linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
* Created 28 Dec 1997 by Geert Uytterhoeven
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/au1000.h>
#include <asm/pb1100.h>
#include "au1100fb.h"
#include <video/fbcon.h>
#include <video/fbcon-mfb.h>
#include <video/fbcon-cfb2.h>
#include <video/fbcon-cfb4.h>
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>
#define CMAPSIZE 16
static int my_lcd_index; /* default is zero */
struct known_lcd_panels *p_lcd;
AU1100_LCD *p_lcd_reg = (AU1100_LCD *)AU1100_LCD_ADDR;
struct au1100fb_info {
struct fb_info_gen gen;
unsigned long fb_virt_start;
unsigned long fb_size;
unsigned long fb_phys;
struct { unsigned red, green, blue, pad; } palette[256];
#if defined(FBCON_HAS_CFB16)
u16 fbcon_cmap16[16];
#endif
};
struct au1100fb_par {
struct fb_var_screeninfo var;
int line_length; // in bytes
int cmap_len; // color-map length
};
static struct au1100fb_info fb_info;
static struct au1100fb_par current_par;
static struct display disp;
int au1100fb_init(void);
void au1100fb_setup(char *options, int *ints);
static int au1100fb_mmap(struct fb_info *fb, struct file *file,
struct vm_area_struct *vma);
static int au1100_blank(int blank_mode, struct fb_info_gen *info);
static struct fb_ops au1100fb_ops = {
owner: THIS_MODULE,
fb_get_fix: fbgen_get_fix,
fb_get_var: fbgen_get_var,
fb_set_var: fbgen_set_var,
fb_get_cmap: fbgen_get_cmap,
fb_set_cmap: fbgen_set_cmap,
fb_pan_display: fbgen_pan_display,
fb_mmap: au1100fb_mmap,
};
static void au1100_detect(void)
{
/*
* This function should detect the current video mode settings
* and store it as the default video mode
*/
/*
* Yeh, well, we're not going to change any settings so we're
* always stuck with the default ...
*/
}
static int au1100_encode_fix(struct fb_fix_screeninfo *fix,
const void *_par, struct fb_info_gen *_info)
{
struct au1100fb_info *info = (struct au1100fb_info *) _info;
struct au1100fb_par *par = (struct au1100fb_par *) _par;
struct fb_var_screeninfo *var = &par->var;
memset(fix, 0, sizeof(struct fb_fix_screeninfo));
fix->smem_start = info->fb_phys;
fix->smem_len = info->fb_size;
fix->type = FB_TYPE_PACKED_PIXELS;
fix->type_aux = 0;
fix->visual = (var->bits_per_pixel == 8) ?
FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
fix->ywrapstep = 0;
fix->xpanstep = 1;
fix->ypanstep = 1;
fix->line_length = par->line_length;
return 0;
}
static void set_color_bitfields(struct fb_var_screeninfo *var)
{
switch (var->bits_per_pixel) {
case 8:
var->red.offset = 0;
var->red.length = 8;
var->green.offset = 0;
var->green.length = 8;
var->blue.offset = 0;
var->blue.length = 8;
var->transp.offset = 0;
var->transp.length = 0;
break;
case 16: /* RGB 565 */
var->red.offset = 11;
var->red.length = 5;
var->green.offset = 5;
var->green.length = 6;
var->blue.offset = 0;
var->blue.length = 5;
var->transp.offset = 0;
var->transp.length = 0;
break;
}
var->red.msb_right = 0;
var->green.msb_right = 0;
var->blue.msb_right = 0;
var->transp.msb_right = 0;
}
static int au1100_decode_var(const struct fb_var_screeninfo *var,
void *_par, struct fb_info_gen *_info)
{
struct au1100fb_par *par = (struct au1100fb_par *)_par;
/*
* Don't allow setting any of these yet: xres and yres don't
* make sense for LCD panels.
*/
if (var->xres != p_lcd->xres ||
var->yres != p_lcd->yres ||
var->xres != p_lcd->xres ||
var->yres != p_lcd->yres) {
return -EINVAL;
}
if(var->bits_per_pixel != p_lcd->bpp) {
return -EINVAL;
}
memset(par, 0, sizeof(struct au1100fb_par));
par->var = *var;
/* FIXME */
switch (var->bits_per_pixel) {
case 8:
par->var.bits_per_pixel = 8;
break;
case 16:
par->var.bits_per_pixel = 16;
break;
default:
printk("color depth %d bpp not supported\n",
var->bits_per_pixel);
return -EINVAL;
}
set_color_bitfields(&par->var);
par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
return 0;
}
static int au1100_encode_var(struct fb_var_screeninfo *var,
const void *par, struct fb_info_gen *_info)
{
*var = ((struct au1100fb_par *)par)->var;
return 0;
}
static void
au1100_get_par(void *_par, struct fb_info_gen *_info)
{
*(struct au1100fb_par *)_par = current_par;
}
static void au1100_set_par(const void *par, struct fb_info_gen *info)
{
/* nothing to do: we don't change any settings */
}
static int au1100_getcolreg(unsigned regno, unsigned *red, unsigned *green,
unsigned *blue, unsigned *transp,
struct fb_info *info)
{
struct au1100fb_info* i = (struct au1100fb_info*)info;
if (regno > 256)
return 1;
*red = i->palette[regno].red;
*green = i->palette[regno].green;
*blue = i->palette[regno].blue;
*transp = 0;
return 0;
}
static int au1100_setcolreg(unsigned regno, unsigned red, unsigned green,
unsigned blue, unsigned transp,
struct fb_info *info)
{
struct au1100fb_info* i = (struct au1100fb_info *)info;
if (regno > 255)
return 1;
i->palette[regno].red = red;
i->palette[regno].green = green;
i->palette[regno].blue = blue;
switch(p_lcd->bpp) {
#ifdef FBCON_HAS_CFB8
case 8:
/* FIXME */
break;
#endif
#ifdef FBCON_HAS_CFB16
case 16:
i->fbcon_cmap16[regno] = (regno << 10) | (regno << 5) | regno;
break;
#endif
default:
break;
}
return 0;
}
static int au1100_blank(int blank_mode, struct fb_info_gen *_info)
{
printk("au1100_blank\n");
switch (blank_mode) {
case VESA_NO_BLANKING:
printk("assert go\n");
p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
break;
case VESA_VSYNC_SUSPEND:
case VESA_HSYNC_SUSPEND:
case VESA_POWERDOWN:
printk("deassert go\n");
p_lcd_reg->lcd_control &= ~LCD_CONTROL_GO;
break;
default:
}
return 0;
}
static void au1100_set_disp(const void *unused, struct display *disp,
struct fb_info_gen *info)
{
disp->screen_base = (char *)fb_info.fb_virt_start;
switch (disp->var.bits_per_pixel) {
#ifdef FBCON_HAS_CFB8
case 8:
disp->dispsw = &fbcon_cfb8;
break;
#endif
#ifdef FBCON_HAS_CFB16
case 16:
disp->dispsw = &fbcon_cfb16;
disp->dispsw_data = fb_info.fbcon_cmap16;
break;
#endif
default:
disp->dispsw = &fbcon_dummy;
disp->dispsw_data = NULL;
break;
}
}
static int
au1100fb_mmap(struct fb_info *fb,
struct file *file,
struct vm_area_struct *vma)
{
unsigned int len;
unsigned long start=0, off;
if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
return -EINVAL;
}
start = fb_info.fb_phys & PAGE_MASK;
len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info.fb_size);
off = vma->vm_pgoff << PAGE_SHIFT;
if ((vma->vm_end - vma->vm_start + off) > len) {
return -EINVAL;
}
off += start;
vma->vm_pgoff = off >> PAGE_SHIFT;
pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
/* This is an IO map - tell maydump to skip this VMA */
vma->vm_flags |= VM_IO;
if (io_remap_page_range(vma->vm_start, off,
vma->vm_end - vma->vm_start,
vma->vm_page_prot))
return -EAGAIN;
return 0;
}
int au1100_pan_display(const struct fb_var_screeninfo *var,
struct fb_info_gen *info)
{
return 0;
}
static struct fbgen_hwswitch au1100_switch = {
au1100_detect,
au1100_encode_fix,
au1100_decode_var,
au1100_encode_var,
au1100_get_par,
au1100_set_par,
au1100_getcolreg,
au1100_setcolreg,
au1100_pan_display,
au1100_blank,
au1100_set_disp
};
int au1100_setmode(void)
{
int words;
/* FIXME Need to accomodate for swivel mode and 12bpp, <8bpp*/
switch (p_lcd->mode_control & LCD_CONTROL_SM)
{
case LCD_CONTROL_SM_0:
case LCD_CONTROL_SM_180:
words = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 32;
break;
case LCD_CONTROL_SM_90:
case LCD_CONTROL_SM_270:
/* is this correct? */
words = (p_lcd->xres * p_lcd->bpp) / 8;
break;
default:
printk("mode_control reg not initialized\n");
return -EINVAL;
}
/*
* Setup LCD controller
*/
p_lcd_reg->lcd_control = p_lcd->mode_control;
p_lcd_reg->lcd_intstatus = 0;
p_lcd_reg->lcd_intenable = 0;
p_lcd_reg->lcd_horztiming = p_lcd->mode_horztiming;
p_lcd_reg->lcd_verttiming = p_lcd->mode_verttiming;
p_lcd_reg->lcd_clkcontrol = p_lcd->mode_clkcontrol;
p_lcd_reg->lcd_words = words - 1;
p_lcd_reg->lcd_dmaaddr0 = fb_info.fb_phys;
/* turn on panel */
writew(readw(PB1500_G_CONTROL) | p_lcd->mode_backlight,
PB1500_G_CONTROL);
p_lcd_reg->lcd_control |= LCD_CONTROL_GO;
return 0;
}
int __init au1100fb_init(void)
{
uint32 sys_clksrc;
unsigned long page;
/*
* Get the panel information/display mode and update the registry
*/
p_lcd = &panels[my_lcd_index];
switch (p_lcd->mode_control & LCD_CONTROL_SM)
{
case LCD_CONTROL_SM_0:
case LCD_CONTROL_SM_180:
p_lcd->xres =
(p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
p_lcd->yres =
(p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
break;
case LCD_CONTROL_SM_90:
case LCD_CONTROL_SM_270:
p_lcd->yres =
(p_lcd->mode_horztiming & LCD_HORZTIMING_PPL) + 1;
p_lcd->xres =
(p_lcd->mode_verttiming & LCD_VERTTIMING_LPP) + 1;
break;
}
/*
* Panel dimensions x bpp must be divisible by 32
*/
if (((p_lcd->yres * p_lcd->bpp) % 32) != 0)
printk("VERT %% 32\n");
if (((p_lcd->xres * p_lcd->bpp) % 32) != 0)
printk("HORZ %% 32\n");
/*
* Allocate LCD framebuffer from system memory
*/
fb_info.fb_size = (p_lcd->xres * p_lcd->yres * p_lcd->bpp) / 8;
current_par.var.xres = p_lcd->xres;
current_par.var.xres_virtual = p_lcd->xres;
current_par.var.yres = p_lcd->yres;
current_par.var.yres_virtual = p_lcd->yres;
current_par.var.bits_per_pixel = p_lcd->bpp;
/* FIX!!! only works for 8/16 bpp */
current_par.line_length = p_lcd->xres * p_lcd->bpp / 8; /* in bytes */
fb_info.fb_virt_start = (unsigned long )
__get_free_pages(GFP_ATOMIC | GFP_DMA,
get_order(fb_info.fb_size + 0x1000));
if (!fb_info.fb_virt_start) {
printk("Unable to allocate fb memory\n");
return -ENOMEM;
}
fb_info.fb_phys = virt_to_bus((void *)fb_info.fb_virt_start);
/*
* Set page reserved so that mmap will work. This is necessary
* since we'll be remapping normal memory.
*/
for (page = fb_info.fb_virt_start;
page < PAGE_ALIGN(fb_info.fb_virt_start + fb_info.fb_size);
page += PAGE_SIZE) {
SetPageReserved(virt_to_page(page));
}
memset((void *)fb_info.fb_virt_start, 0, fb_info.fb_size);
/* set freqctrl now to allow more time to stabilize */
/* zero-out out LCD bits */
sys_clksrc = readl(SYS_CLKSRC) & ~0x000003e0;
sys_clksrc |= p_lcd->mode_toyclksrc;
writel(sys_clksrc, SYS_CLKSRC);
/* FIXME add check to make sure auxpll is what is expected! */
au1100_setmode();
fb_info.gen.parsize = sizeof(struct au1100fb_par);
fb_info.gen.fbhw = &au1100_switch;
strcpy(fb_info.gen.info.modename, "Au1100 LCD");
fb_info.gen.info.changevar = NULL;
fb_info.gen.info.node = -1;
fb_info.gen.info.fbops = &au1100fb_ops;
fb_info.gen.info.disp = &disp;
fb_info.gen.info.switch_con = &fbgen_switch;
fb_info.gen.info.updatevar = &fbgen_update_var;
fb_info.gen.info.blank = &fbgen_blank;
fb_info.gen.info.flags = FBINFO_FLAG_DEFAULT;
/* This should give a reasonable default video mode */
fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
fbgen_set_disp(-1, &fb_info.gen);
fbgen_install_cmap(0, &fb_info.gen);
if (register_framebuffer(&fb_info.gen.info) < 0)
return -EINVAL;
printk(KERN_INFO "fb%d: %s frame buffer device\n",
GET_FB_IDX(fb_info.gen.info.node),
fb_info.gen.info.modename);
/* uncomment this if your driver cannot be unloaded */
/* MOD_INC_USE_COUNT; */
return 0;
}
void au1100fb_cleanup(struct fb_info *info)
{
unregister_framebuffer(info);
}
void au1100fb_setup(char *options, int *ints)
{
char* this_opt;
int i;
if (!options || !*options)
return;
this_opt=strtok(options, ",");
/* Get the panel name, everything else if fixed */
for (i=0; i<(sizeof(panels)/sizeof(struct known_lcd_panels)); i++) {
if (!strncmp(this_opt, panels[i].panel_name,
strlen(this_opt))) {
my_lcd_index = i;
break;
}
}
}
#if 0
/* If all you need is that - just don't define ->fb_open */
static int au1100fb_open(const struct fb_info *info, int user)
{
return 0;
}
/* If all you need is that - just don't define ->fb_release */
static int au1100fb_release(const struct fb_info *info, int user)
{
return 0;
}
#endif
#ifdef MODULE
MODULE_LICENSE("GPL");
int init_module(void)
{
return au1100fb_init();
}
void cleanup_module(void)
{
au1100fb_cleanup(void);
}
MODULE_AUTHOR("Pete Popov <pp...@mv...>");
MODULE_DESCRIPTION("Au1100 LCD framebuffer device driver");
#endif /* MODULE */
--- NEW FILE: au1100fb.h ---
/*
* BRIEF MODULE DESCRIPTION
* Hardware definitions for the Au1100 LCD controller
*
* Copyright 2002 MontaVista Software
* Copyright 2002 Alchemy Semiconductor
* Author: Alchemy Semiconductor, MontaVista Software
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _AU1100LCD_H
#define _AU1100LCD_H
/********************************************************************/
#define uint32 unsigned long
typedef volatile struct
{
uint32 lcd_control;
uint32 lcd_intstatus;
uint32 lcd_intenable;
uint32 lcd_horztiming;
uint32 lcd_verttiming;
uint32 lcd_clkcontrol;
uint32 lcd_dmaaddr0;
uint32 lcd_dmaaddr1;
uint32 lcd_words;
uint32 lcd_pwmdiv;
uint32 lcd_pwmhi;
uint32 reserved[(0x0400-0x002C)/4];
uint32 lcd_pallettebase[256];
} AU1100_LCD;
/********************************************************************/
#define AU1100_LCD_ADDR 0xB5000000
/*
* Register bit definitions
*/
/* lcd_control */
#define LCD_CONTROL_SBPPF (7<<18)
#define LCD_CONTROL_SBPPF_655 (0<<18)
#define LCD_CONTROL_SBPPF_565 (1<<18)
#define LCD_CONTROL_SBPPF_556 (2<<18)
#define LCD_CONTROL_SBPPF_1555 (3<<18)
#define LCD_CONTROL_SBPPF_5551 (4<<18)
#define LCD_CONTROL_WP (1<<17)
#define LCD_CONTROL_WD (1<<16)
#define LCD_CONTROL_C (1<<15)
#define LCD_CONTROL_SM (3<<13)
#define LCD_CONTROL_SM_0 (0<<13)
#define LCD_CONTROL_SM_90 (1<<13)
#define LCD_CONTROL_SM_180 (2<<13)
#define LCD_CONTROL_SM_270 (3<<13)
#define LCD_CONTROL_DB (1<<12)
#define LCD_CONTROL_CCO (1<<11)
#define LCD_CONTROL_DP (1<<10)
#define LCD_CONTROL_PO (3<<8)
#define LCD_CONTROL_PO_00 (0<<8)
#define LCD_CONTROL_PO_01 (1<<8)
#define LCD_CONTROL_PO_10 (2<<8)
#define LCD_CONTROL_PO_11 (3<<8)
#define LCD_CONTROL_MPI (1<<7)
#define LCD_CONTROL_PT (1<<6)
#define LCD_CONTROL_PC (1<<5)
#define LCD_CONTROL_BPP (7<<1)
#define LCD_CONTROL_BPP_1 (0<<1)
#define LCD_CONTROL_BPP_2 (1<<1)
#define LCD_CONTROL_BPP_4 (2<<1)
#define LCD_CONTROL_BPP_8 (3<<1)
#define LCD_CONTROL_BPP_12 (4<<1)
#define LCD_CONTROL_BPP_16 (5<<1)
#define LCD_CONTROL_GO (1<<0)
/* lcd_intstatus, lcd_intenable */
#define LCD_INT_SD (1<<7)
#define LCD_INT_OF (1<<6)
#define LCD_INT_UF (1<<5)
#define LCD_INT_SA (1<<3)
#define LCD_INT_SS (1<<2)
#define LCD_INT_S1 (1<<1)
#define LCD_INT_S0 (1<<0)
/* lcd_horztiming */
#define LCD_HORZTIMING_HN2 (255<<24)
#define LCD_HORZTIMING_HN2_N(N) (((N)-1)<<24)
#define LCD_HORZTIMING_HN1 (255<<16)
#define LCD_HORZTIMING_HN1_N(N) (((N)-1)<<16)
#define LCD_HORZTIMING_HPW (63<<10)
#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<10)
#define LCD_HORZTIMING_PPL (1023<<0)
#define LCD_HORZTIMING_PPL_N(N) (((N)-1)<<0)
/* lcd_verttiming */
#define LCD_VERTTIMING_VN2 (255<<24)
#define LCD_VERTTIMING_VN2_N(N) (((N)-1)<<24)
#define LCD_VERTTIMING_VN1 (255<<16)
#define LCD_VERTTIMING_VN1_N(N) (((N)-1)<<16)
#define LCD_VERTTIMING_VPW (63<<10)
#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<10)
#define LCD_VERTTIMING_LPP (1023<<0)
#define LCD_VERTTIMING_LPP_N(N) (((N)-1)<<0)
/* lcd_clkcontrol */
#define LCD_CLKCONTROL_IB (1<<18)
#define LCD_CLKCONTROL_IC (1<<17)
#define LCD_CLKCONTROL_IH (1<<16)
#define LCD_CLKCONTROL_IV (1<<15)
#define LCD_CLKCONTROL_BF (31<<10)
#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
#define LCD_CLKCONTROL_PCD (1023<<0)
#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
/* lcd_pwmdiv */
#define LCD_PWMDIV_EN (1<<12)
#define LCD_PWMDIV_PWMDIV (2047<<0)
#define LCD_PWMDIV_PWMDIV_N(N) (((N)-1)<<0)
/* lcd_pwmhi */
#define LCD_PWMHI_PWMHI1 (2047<<12)
#define LCD_PWMHI_PWMHI1_N(N) ((N)<<12)
#define LCD_PWMHI_PWMHI0 (2047<<0)
#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
/* lcd_pallettebase - MONOCHROME */
#define LCD_PALLETTE_MONO_MI (15<<0)
#define LCD_PALLETTE_MONO_MI_N(N) ((N)<<0)
/* lcd_pallettebase - COLOR */
#define LCD_PALLETTE_COLOR_BI (15<<8)
#define LCD_PALLETTE_COLOR_BI_N(N) ((N)<<8)
#define LCD_PALLETTE_COLOR_GI (15<<4)
#define LCD_PALLETTE_COLOR_GI_N(N) ((N)<<4)
#define LCD_PALLETTE_COLOR_RI (15<<0)
#define LCD_PALLETTE_COLOR_RI_N(N) ((N)<<0)
/* lcd_palletebase - COLOR TFT PALLETIZED */
#define LCD_PALLETTE_TFT_DC (65535<<0)
#define LCD_PALLETTE_TFT_DC_N(N) ((N)<<0)
/********************************************************************/
enum EGPEFormat
{
gpe1Bpp,
gpe2Bpp,
gpe4Bpp,
gpe8Bpp,
gpe16Bpp,
gpe24Bpp,
gpe32Bpp,
gpe16YCrCb,
gpeDeviceCompatible,
gpeUndefined
};
struct known_lcd_panels
{
uint32 xres;
uint32 yres;
uint32 bpp;
unsigned char panel_name[256];
uint32 mode_control;
uint32 mode_horztiming;
uint32 mode_verttiming;
uint32 mode_clkcontrol;
uint32 mode_pwmdiv;
uint32 mode_pwmhi;
uint32 mode_toyclksrc;
uint32 mode_backlight;
};
/*
* The fb driver assumes that AUX PLL is at 48MHz. That can
* cover up to 800x600 resolution; if you need higher resolution,
* you should modify the driver as needed, not just this structure.
*/
struct known_lcd_panels panels[] =
{
{ /* 0: Pb1100 LCDA: Sharp 320x240 TFT panel */
320, /* xres */
240, /* yres */
16, /* bpp */
"Sharp_320x240_16",
/* mode_control */
( LCD_CONTROL_SBPPF_565
/*LCD_CONTROL_WP*/
/*LCD_CONTROL_WD*/
| LCD_CONTROL_C
| LCD_CONTROL_SM_0
/*LCD_CONTROL_DB*/
/*LCD_CONTROL_CCO*/
/*LCD_CONTROL_DP*/
| LCD_CONTROL_PO_00
/*LCD_CONTROL_MPI*/
| LCD_CONTROL_PT
| LCD_CONTROL_PC
| LCD_CONTROL_BPP_16 ),
/* mode_horztiming */
( LCD_HORZTIMING_HN2_N(8)
| LCD_HORZTIMING_HN1_N(60)
| LCD_HORZTIMING_HPW_N(12)
| LCD_HORZTIMING_PPL_N(320) ),
/* mode_verttiming */
( LCD_VERTTIMING_VN2_N(5)
| LCD_VERTTIMING_VN1_N(17)
| LCD_VERTTIMING_VPW_N(1)
| LCD_VERTTIMING_LPP_N(240) ),
/* mode_clkcontrol */
( 0
/*LCD_CLKCONTROL_IB*/
/*LCD_CLKCONTROL_IC*/
/*LCD_CLKCONTROL_IH*/
/*LCD_CLKCONTROL_IV*/
| LCD_CLKCONTROL_PCD_N(1) ),
/* mode_pwmdiv */
0,
/* mode_pwmhi */
0,
/* mode_toyclksrc */
((1<<7) | (1<<6) | (1<<5)),
/* mode_backlight */
6
},
{ /* 1: Pb1100 LCDC 640x480 TFT panel */
640, /* xres */
480, /* yres */
16, /* bpp */
"Generic_640x480_16",
/* mode_control */
0x004806a,
/* mode_horztiming */
0x3434d67f,
/* mode_verttiming */
0x0e0e39df,
/* mode_clkcontrol */
( 0
/*LCD_CLKCONTROL_IB*/
/*LCD_CLKCONTROL_IC*/
/*LCD_CLKCONTROL_IH*/
/*LCD_CLKCONTROL_IV*/
| LCD_CLKCONTROL_PCD_N(1) ),
/* mode_pwmdiv */
0,
/* mode_pwmhi */
0,
/* mode_toyclksrc */
((1<<7) | (1<<6) | (0<<5)),
/* mode_backlight */
7
},
{ /* 2: Pb1100 LCDB 640x480 PrimeView/Casio TFT panel */
640, /* xres */
480, /* yres */
16, /* bpp */
"Casio_640x480_16",
/* mode_control */
0x0004886a,
/* mode_horztiming */
0x0e4bfe7f,
/* mode_verttiming */
0x210805df,
/* mode_clkcontrol */
0x00038001,
/* mode_pwmdiv */
0,
/* mode_pwmhi */
0,
/* mode_toyclksrc */
((1<<7) | (1<<6) | (0<<5)),
/* mode_backlight */
7
},
{ /* 3: Pb1100 800x600x16bpp NEON CRT */
800, /* xres */
600, /* yres */
16, /* bpp */
"NEON_800x600_16",
/* mode_control */
0x0004886A,
/* mode_horztiming */
0x005AFF1F,
/* mode_verttiming */
0x16000E57,
/* mode_clkcontrol */
0x00020000,
/* mode_pwmdiv */
0,
/* mode_pwmhi */
0,
/* mode_toyclksrc */
((1<<7) | (1<<6) | (0<<5)),
/* mode_backlight */
7
},
{ /* 4: Pb1100 640x480x16bpp NEON CRT */
640, /* xres */
480, /* yres */
16, /* bpp */
"NEON_640x480_16",
/* mode_control */
0x0004886A,
/* mode_horztiming */
0x0052E27F,
/* mode_verttiming */
0x18000DDF,
/* mode_clkcontrol */
0x00020000,
/* mode_pwmdiv */
0,
/* mode_pwmhi */
0,
/* mode_toyclksrc */
((1<<7) | (1<<6) | (0<<5)),
/* mode_backlight */
7
},
};
#endif /* _AU1100LCD_H */
Index: Config.in
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Config.in,v
retrieving revision 1.16
retrieving revision 1.17
diff -u -d -r1.16 -r1.17
--- Config.in 2 Apr 2002 22:38:34 -0000 1.16
+++ Config.in 10 Apr 2002 01:10:11 -0000 1.17
@@ -159,6 +159,9 @@
bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
fi
+ if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
+ bool ' Au1100 LCD Driver' CONFIG_FB_PB1100
+ fi
fi
tristate ' ITE IT8181 framebuffer support' CONFIG_FB_IT8181
tristate ' Simple Frame Buffer support' CONFIG_FB_SIMPLE
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/Makefile,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- Makefile 2 Apr 2002 22:38:34 -0000 1.13
+++ Makefile 10 Apr 2002 01:10:11 -0000 1.14
@@ -86,6 +86,7 @@
obj-$(CONFIG_FB_MAXINE) += maxinefb.o
obj-$(CONFIG_FB_TX3912) += tx3912fb.o
obj-$(CONFIG_FB_MQ200) += mq200fb.o
+obj-$(CONFIG_FB_PB1100) += au1100fb.o fbgen.o
subdir-$(CONFIG_FB_MATROX) += matrox
ifeq ($(CONFIG_FB_MATROX),y)
Index: fbmem.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/video/fbmem.c,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -d -r1.20 -r1.21
--- fbmem.c 2 Apr 2002 22:38:34 -0000 1.20
+++ fbmem.c 10 Apr 2002 01:10:12 -0000 1.21
@@ -301,9 +301,6 @@
#ifdef CONFIG_FB_E1356
{ "e1356fb", e1356fb_init, e1356fb_setup },
#endif
-#ifdef CONFIG_FB_AU1100
- { "au1100fb", au1100fb_init, au1100fb_setup },
-#endif
#ifdef CONFIG_FB_IT8181
{ "it8181fb", it8181fb_init, it8181fb_setup },
#endif
@@ -331,6 +328,9 @@
#ifdef CONFIG_FB_HPCSFB
{ "hpcsfb", hpcsfb_init, hpcsfb_setup },
#endif
+#ifdef CONFIG_FB_PB1100
+ { "au1100fb", au1100fb_init, au1100fb_setup },
+#endif
/*
* Generic drivers that don't use resource management (yet)
|
