[Linux-mips-commits]CVS: linux/drivers/net au1000_eth.c,1.8,1.9 au1000_eth.h,1.3,1.4

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/drivers/net
In directory usw-pr-cvs1:/tmp/cvs-serv13922/drivers/net

Modified Files:
	au1000_eth.c au1000_eth.h 
Log Message:
Pb1100 support.


Index: au1000_eth.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- au1000_eth.c	15 Feb 2002 19:47:27 -0000	1.8
+++ au1000_eth.c	2 Apr 2002 22:59:39 -0000	1.9
@@ -121,9 +121,12 @@
   au1500_iflist[NUM_INTERFACES] = {
 		{AU1500_ETH0_BASE, AU1000_ETH0_IRQ}, 
 		{AU1500_ETH1_BASE, AU1000_ETH1_IRQ}
+	},
+  au1100_iflist[NUM_INTERFACES] = {
+		{AU1000_ETH0_BASE, AU1000_ETH0_IRQ}, 
+		{NULL, NULL}
 	};
 
-
 static char version[] __devinitdata =
     "au1000eth.c:1.0 pp...@mv...\n";
 
@@ -636,12 +639,18 @@
 		} else if ( (prid & 0xffff0000) == 0x01030000 ) {
 			base_addr = au1500_iflist[i].port;
 			irq = au1500_iflist[i].irq;
+		} else if ( (prid & 0xffff0000) == 0x02030000 ) {
+			base_addr = au1100_iflist[i].port;
+			irq = au1100_iflist[i].irq;
 		} else {
 			printk(KERN_ERR "au1000 eth: unknown Processor ID\n");
 			return -ENODEV;
 		}
-		if (au1000_probe1(NULL, base_addr, irq, i) != 0) {
-			return -ENODEV;
+		// check for valid entries, au1100 only has one entry
+		if (base_addr && irq) {
+			if (au1000_probe1(NULL, base_addr, irq, i) != 0) {
+				return -ENODEV;
+			}
 		}
 	}
 	return 0;

Index: au1000_eth.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/au1000_eth.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- au1000_eth.h	4 Dec 2001 03:36:09 -0000	1.3
+++ au1000_eth.h	2 Apr 2002 22:59:39 -0000	1.4
@@ -39,7 +39,7 @@
 #define ETH_TX_TIMEOUT HZ/4
 #define MAC_MIN_PKT_SIZE 64
 
-#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500)
+#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100)
 #define PHY_ADDRESS              0
 #define PHY_CONTROL_DEFAULT 0x3000
 #define PHY_CONTROL_REG_ADDR     0