[Linux-mips-commits]CVS: linux/arch/mips/vr41xx/common power.c,1.1,1.2

[Leblanc f. <fle...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/vr41xx/common
In directory usw-pr-cvs1:/tmp/cvs-serv6638/arch/mips/vr41xx/common

Modified Files:
	power.c 
Log Message:
Casio E15 power on/off improvement & GPIO Documentation added.


Index: power.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/vr41xx/common/power.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- power.c	7 Mar 2002 09:15:16 -0000	1.1
+++ power.c	22 Mar 2002 10:22:43 -0000	1.2
@@ -33,6 +33,11 @@
  */
 extern struct semaphore vr41xx_dma_sem;
 
+extern void vr41xx_extend_hibernate(void);
+extern void vr41xx_board_hibernate(void);
+extern void vr41xx_board_suspend(void);
+extern void vr41xx_board_standby(void);
+
 #ifdef CONFIG_PM_SUSPEND_WAKEUP
 
 //
@@ -76,7 +81,6 @@
 unsigned int powerevent_queued;
 unsigned int hibernation_state = LOAD_MAGIC;
 static unsigned short clkmsk_state;
-//extern void do_pm_irq_request(pm_request_t rqst);
 
 #ifndef VR41XX_IRQ_MAX      
 #define VR41XX_IRQ_MAX ((VR41XX_NUM_CPU_IRQ)+(VR41XX_NUM_SYS_IRQ)+(VR41XX_NUM_GPIO_IRQ))
@@ -148,17 +152,19 @@
 		gpio_state[i] = *(MIN_GPIOREG + i);
 	clkmsk_state = *VR41XX_CMUCLKMSK;
 
+	// do more board specific hibernate code
+#ifdef CONFIG_VR41XX_EXTEND_HIBERNATE
+	vr41xx_extend_hibernate();
+#endif
+	
 	// we may want to put in some checksum or CRC on all of RAM, too
-
 	hibernation_state = HIB_MAGIC;
-	//flush_cache_all();
-	//vr41xx_hibernate();
-	machine_halt ();
+	flush_cache_all();
+	vr41xx_board_hibernate();
 	// never reached...
 }
 
-//asmlinkage int do_wakeup(void)
-asmlinkage void do_wakeup(char *command)
+asmlinkage int do_wakeup(void)
 {
 	int i, retval;
 
@@ -167,12 +173,10 @@
 	write_32bit_cp0_register(CP0_STATUS, ST0_CU0);
 
 	// Do what loadmmu would have done if cold init
-	//set_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
 	flush_cache_all();
 	write_32bit_cp0_register(CP0_WIRED, 0);
 	set_pagemask(PM_4K);
-	//write_32bit_cp0_register(CP0_PAGEMASK, PM_4K);
 	flush_tlb_all();
 
 	// this is about the point where we would check CRC if we did one
@@ -186,7 +190,7 @@
 		sti();
 		up(&vr41xx_dma_sem);
 	}
-	//return retval;
+	return retval;
 }
 
 /*
@@ -260,8 +264,7 @@
 			up(&vr41xx_dma_sem);
 			return retval;
 		}
-		//vr41xx_suspend();
-		machine_power_off ();
+		vr41xx_board_suspend();
 		
 		retval = pm_send_all(PM_RESUME, (void *)0);
 		up(&vr41xx_dma_sem);
@@ -293,8 +296,7 @@
 	} else {
 // MFK: replace with send PM_SUSPEND request to pm_time_request:
 		disable_irq(VR41XX_IRQ_INT1);
-		//vr41xx_standby();
-		machine_power_off ();
+		vr41xx_board_standby ();
 // MFK: replace with send PM_RESUME request to pm_time_request:
 		enable_irq(VR41XX_IRQ_INT1);
 	}