From: James S. <jsi...@us...> - 2002-03-18 22:46:34
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Update of /cvsroot/linux-mips/linux/include/asm-mips In directory usw-pr-cvs1:/tmp/cvs-serv32579 Modified Files: pgtable.h Log Message: Updates and fixed typo. Index: pgtable.h =================================================================== RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pgtable.h,v retrieving revision 1.14 retrieving revision 1.15 diff -u -d -r1.14 -r1.15 --- pgtable.h 9 Mar 2002 01:36:19 -0000 1.14 +++ pgtable.h 18 Mar 2002 22:46:30 -0000 1.15 @@ -19,7 +19,6 @@ #include <asm/cachectl.h> #include <asm/fixmap.h> - /* Cache flushing: * * - flush_cache_all() flushes entire cache @@ -92,6 +91,11 @@ #endif /* !defined (_LANGUAGE_ASSEMBLY) */ /* PMD_SHIFT determines the size of the area a second-level page table can map */ +#ifdef CONFIG_64BIT_PHYS_ADDR +#define PMD_SHIFT 21 +#else +#define PMD_SHIFT 22 +#endif #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) @@ -104,6 +108,17 @@ * Entries per page directory level: we use two-level, so * we don't really have any PMD directory physically. */ +#ifdef CONFIG_64BIT_PHYS_ADDR +#define PTRS_PER_PTE 512 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 2048 +#define PGD_ORDER 1 +#else +#define PTRS_PER_PTE 1024 +#define PTRS_PER_PMD 1 +#define PTRS_PER_PGD 1024 +#define PGD_ORDER 0 +#endif #define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) #define FIRST_USER_PGD_NR 0 @@ -171,6 +186,7 @@ #define _CACHE_UNCACHED (2<<9) #define _CACHE_CACHABLE_COW (5<<9) #define _CACHE_CACHABLE_NONCOHERENT (5<<9) +#define _CACHE_UNCACHED_ACCELERATED (7<<9) #else @@ -181,7 +197,7 @@ #define _CACHE_CACHABLE_CE (4<<9) /* R4[04]00 only */ #define _CACHE_CACHABLE_COW (5<<9) /* R4[04]00 only */ #define _CACHE_CACHABLE_CUW (6<<9) /* R4[04]00 only */ -#define _CACHE_CACHABLE_ACCELERATED (7<<9) /* R10000 only */ +#define _CACHE_UNCACHED_ACCELERATED (7<<9) /* R10000 only */ #endif #endif @@ -236,13 +252,19 @@ #define __S110 PAGE_SHARED #define __S111 PAGE_SHARED -#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) -#include <asm/pgtable-3level.h> +#if !defined (_LANGUAGE_ASSEMBLY) + +#ifdef CONFIG_64BIT_PHYS_ADDR +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) #else -#include <asm/pgtable-2level.h> +#define pte_ERROR(e) \ + printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) #endif - -#if !defined (_LANGUAGE_ASSEMBLY) +#define pmd_ERROR(e) \ + printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) +#define pgd_ERROR(e) \ + printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) extern unsigned long empty_zero_page; extern unsigned long zero_page_mask; @@ -268,7 +290,29 @@ pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK); } +static inline int pte_none(pte_t pte) { return !pte_val(pte); } +static inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ +static inline void set_pte(pte_t *ptep, pte_t pteval) +{ + *ptep = pteval; +} + +static inline void pte_clear(pte_t *ptep) +{ + set_pte(ptep, __pte(0)); +} +/* + * (pmds are folded into pgds so this doesnt get actually called, + * but the define is needed for a generic inline function.) + */ +#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) +#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) /* * Empty pgd/pmd entries point to the invalid_pte_table. @@ -295,12 +339,6 @@ } /* - * Permanent address of a page. Obviously must never be called on a highmem - * page. - */ -#define page_address(page) ((page)->virtual) - -/* * The "pgd_xxx()" functions here are trivial for a folded two-level * setup: the pgd is never bad, and a pmd always exists (as it's folded * into the pgd entry) @@ -311,69 +349,70 @@ static inline void pgd_clear(pgd_t *pgdp) { } /* + * Permanent address of a page. Obviously must never be called on a highmem + * page. + */ +#define page_address(page) ((page)->virtual) +#ifdef CONFIG_CPU_VR41XX +#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> (PAGE_SHIFT + 2)))) +#else +#define pte_page(x) (mem_map+(unsigned long)((pte_val(x) >> PAGE_SHIFT))) +#endif + +/* * The following only work if pte_present() is true. * Undefined behaviour if not.. */ -static inline int pte_present(pte_t pte) { return (pte.pte_low) & _PAGE_PRESENT; } - -static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } -static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } -static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } -static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } - -static inline void pte_clear(pte_t *ptep) -{ - set_pte(ptep, __pte(0)); -} +static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; } +static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } +static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; } +static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } static inline pte_t pte_wrprotect(pte_t pte) { - (pte).pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); + pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); return pte; } static inline pte_t pte_rdprotect(pte_t pte) { - (pte).pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ); + pte_val(pte) &= ~(_PAGE_READ | _PAGE_SILENT_READ); return pte; } static inline pte_t pte_mkclean(pte_t pte) { - (pte).pte_low &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE); + pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE); return pte; } static inline pte_t pte_mkold(pte_t pte) { - (pte).pte_low &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); + pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); return pte; } static inline pte_t pte_mkwrite(pte_t pte) { - (pte).pte_low |= _PAGE_WRITE; - if ((pte).pte_low & _PAGE_MODIFIED) { - (pte).pte_low |= _PAGE_SILENT_WRITE; - } + pte_val(pte) |= _PAGE_WRITE; + if (pte_val(pte) & _PAGE_MODIFIED) + pte_val(pte) |= _PAGE_SILENT_WRITE; return pte; } static inline pte_t pte_mkread(pte_t pte) { - (pte).pte_low |= _PAGE_READ; - if ((pte).pte_low & _PAGE_ACCESSED) { - (pte).pte_low |= _PAGE_SILENT_READ; - } + pte_val(pte) |= _PAGE_READ; + if (pte_val(pte) & _PAGE_ACCESSED) + pte_val(pte) |= _PAGE_SILENT_READ; return pte; } static inline pte_t pte_mkdirty(pte_t pte) { - (pte).pte_low |= _PAGE_MODIFIED; - if ((pte).pte_low & _PAGE_WRITE) { - (pte).pte_low |= _PAGE_SILENT_WRITE; - } + pte_val(pte) |= _PAGE_MODIFIED; + if (pte_val(pte) & _PAGE_WRITE) + pte_val(pte) |= _PAGE_SILENT_WRITE; return pte; } @@ -396,9 +435,9 @@ static inline pte_t pte_mkyoung(pte_t pte) { - (pte).pte_low |= _PAGE_ACCESSED; - if ((pte).pte_low & _PAGE_READ) - (pte).pte_low |= _PAGE_SILENT_READ; + pte_val(pte) |= _PAGE_ACCESSED; + if (pte_val(pte) & _PAGE_READ) + pte_val(pte) |= _PAGE_SILENT_READ; return pte; } @@ -407,20 +446,41 @@ * and a page entry and page directory to the page they refer to. */ -#define mk_pte(page, pgprot) __mk_pte((page) - mem_map, (pgprot)) -#define mk_pte_phys(physpage, pgprot) __mk_pte((physpage) >> PAGE_SHIFT, pgprot) +#ifdef CONFIG_CPU_VR41XX +#define mk_pte(page, pgprot) \ +({ \ + pte_t __pte; \ + \ + pte_val(__pte) = ((phys_t)(page - mem_map) << (PAGE_SHIFT + 2)) | \ + pgprot_val(pgprot); \ + \ + __pte; \ +}) +#else +#define mk_pte(page, pgprot) \ +({ \ + pte_t __pte; \ + \ + pte_val(__pte) = ((phys_t)(page - mem_map) << PAGE_SHIFT) | \ + pgprot_val(pgprot); \ + \ + __pte; \ +}) +#endif -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +static inline pte_t mk_pte_phys(phys_t physpage, pgprot_t pgprot) { - return __pte(((pte).pte_low & _PAGE_CHG_MASK) | pgprot_val(newprot)); +#ifdef CONFIG_CPU_VR41XX + return __pte((physpage << 2) | pgprot_val(pgprot)); +#else + return __pte(physpage | pgprot_val(pgprot)); +#endif } -/* - * (pmds are folded into pgds so this doesnt get actually called, - * but the define is needed for a generic inline function.) - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) -#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval) +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); +} #define page_pte(page) page_pte_prot(page, __pgprot(0)) @@ -463,7 +523,7 @@ #define SWP_TYPE(x) (((x).val >> 1) & 0x3f) #define SWP_OFFSET(x) ((x).val >> 8) #define SWP_ENTRY(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) -#define pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low }) +#define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define swp_entry_to_pte(x) ((pte_t) { (x).val }) |