From: Pete P. <pp...@us...> - 2002-03-09 01:36:22
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Update of /cvsroot/linux-mips/linux/arch/mips/mm In directory usw-pr-cvs1:/tmp/cvs-serv757/arch/mips/mm Modified Files: Makefile tlb-r4k.c Log Message: 36 bit support for MIPS32 CPUs. Index: Makefile =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/Makefile,v retrieving revision 1.14 retrieving revision 1.15 diff -u -d -r1.14 -r1.15 --- Makefile 19 Jan 2002 21:17:35 -0000 1.14 +++ Makefile 9 Mar 2002 01:36:19 -0000 1.15 @@ -28,7 +28,7 @@ obj-$(CONFIG_CPU_R5432) += pg-r5432.o c-r5432.o tlb-r4k.o tlbex-r4k.o obj-$(CONFIG_CPU_RM7000) += pg-rm7k.o c-rm7k.o tlb-r4k.o tlbex-r4k.o obj-$(CONFIG_CPU_R10000) += pg-andes.o c-andes.o tlb-r4k.o tlbex-r4k.o -obj-$(CONFIG_CPU_MIPS32) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-r4k.o +obj-$(CONFIG_CPU_MIPS32) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-mips32.o obj-$(CONFIG_CPU_MIPS64) += pg-mips32.o c-mips32.o tlb-r4k.o tlbex-r4k.o obj-$(CONFIG_CPU_SR7100) += pg-mips32.o c-sr7100.o tlb-r4k.o tlbex-r4k.o obj-$(CONFIG_CPU_SB1) += pg-sb1.o c-sb1.o tlb-sb1.o tlbex-r4k.o Index: tlb-r4k.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-r4k.c,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- tlb-r4k.c 28 Jan 2002 23:15:25 -0000 1.10 +++ tlb-r4k.c 9 Mar 2002 01:36:19 -0000 1.11 @@ -211,8 +211,14 @@ idx = get_index(); ptep = pte_offset(pmdp, address); BARRIER; +#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) + set_entrylo0(ptep->pte_high); + ptep++; + set_entrylo1(ptep->pte_high); +#else set_entrylo0(pte_val(*ptep++) >> 6); set_entrylo1(pte_val(*ptep) >> 6); +#endif set_entryhi(address | (pid)); BARRIER; if (idx < 0) { |