[Linux-mips-commits]CVS: linux/arch/mips/kernel head.S,1.13,1.14 scall_o32.S,1.7,1.8

[Leblanc f. <fle...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv3157/arch/mips/kernel

Modified Files:
	head.S scall_o32.S 
Log Message:
Adds more VR stuff for Cassiopeia E15 Support.


Index: head.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/head.S,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- head.S	26 Feb 2002 17:34:14 -0000	1.13
+++ head.S	7 Mar 2002 09:15:16 -0000	1.14
@@ -27,6 +27,9 @@
 #include <asm/cachectl.h>
 #include <asm/mipsregs.h>
 #include <asm/stackframe.h>
+#ifdef CONFIG_PM_SUSPEND_WAKEUP
+#include <asm/power.h>
+#endif
 
 		__INIT
 
@@ -115,6 +118,92 @@
 		/* The following two symbols are used for kernel profiling. */
 		EXPORT(stext)
 		EXPORT(_stext)
+
+#ifdef CONFIG_PM_SUSPEND_WAKEUP
+	.set	reorder
+
+	// Check if we were hibernating.
+	lw	t0, hibernation_state
+	la	t1, HIB_MAGIC
+	la	t2, RUN_MAGIC
+	sw	t2, hibernation_state
+	bne	t0, t1, end_check_hibernating
+
+	.set	noreorder
+	.set	mips3
+
+	// Appears that we were hibernating, so wake up.
+
+	// Jump to KESG1 here instead of assuming that the bootloader
+	// already has us there.
+	la	t0, 1f
+	li	t1, 0x1fffffff
+	and	t0, t1
+	li	t1, 0xa0000000
+	or	t0, t1
+	jr	t0
+	 nop
+1:
+	
+	// Don't trust the bootloader to invalidate the caches.
+
+	// Invalidate the instruction cache.
+	mtc0	zero, CP0_TAGLO
+	li	s0, 0x80000000
+	li	s1, 0x80000000 + (1 << 14) // 16k
+1:
+	cache	(2 << 2) | 0, (s0)
+	add	s0, 0x10
+	bne	s0, s1, 1b
+	 nop
+
+	// Invalidate the data cache.
+	mtc0	zero, CP0_TAGLO
+	li	s0, 0x80000000
+	li	s1, 0x80000000 + (1 << 13) // 8k
+1:
+	cache	(2 << 2) | 1, (s0)
+	add	s0, 0x10
+	bne	s0, s1, 1b
+	 nop
+
+	.set	reorder
+
+	// Jump to linked segment.
+	la	t0, 1f
+	jr	t0
+1:
+
+	// Restore the stack and do the wakeup sequence.
+	lw	sp, kernelsp
+	subu	sp, PT_SIZE
+	ori	$28, sp, 0x1fff;
+	xori	$28, 0x1fff;
+	jal	do_wakeup
+
+	bnez	v0, end_check_hibernating
+
+	j	ret_from_hib_wakeup
+
+end_check_hibernating:
+	.set	noreorder
+#endif
+
+#ifdef CONFIG_XIP_ROM
+	/*
+	 * For xip from rom, copy initialized data from end of text in rom
+	 * to _fdata though _edata in ram.
+	 */
+	la	s0, _etext
+	la	s1, _fdata
+	la	s2, _edata
+1:
+	lw	t0, (s0)
+	sw	t0, (s1)
+	addi	s1, 4
+	bne	s1, s2, 1b
+	 addi	s0, 4
+#endif
 
 		/*
 		 * Stack for kernel and init, current variable

Index: scall_o32.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/scall_o32.S,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- scall_o32.S	2 Jan 2002 19:53:45 -0000	1.7
+++ scall_o32.S	7 Mar 2002 09:15:16 -0000	1.8
@@ -66,6 +66,16 @@
 	sw	v0, PT_R0(sp)		# set flag for syscall restarting
 1:	sw	v0, PT_R2(sp)		# result
 
+#ifdef CONFIG_PM_SUSPEND_WAKEUP
+	lw	t0, powerevent_queued
+	beqz	t0, 1f
+	move	a0, sp
+	SAVE_STATIC
+	jal	do_hibernate
+EXPORT(ret_from_hib_wakeup)
+	RESTORE_STATIC
+1:
+#endif
 EXPORT(o32_ret_from_sys_call)
 	mfc0	t0, CP0_STATUS		# need_resched and signals atomic test
 	ori	t0, t0, 1