[Linux-mips-commits]CVS: linux/arch/mips/kernel smp.c,1.13,1.14

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv15005

Modified Files:
	smp.c 
Log Message:
Make start_secondary a void function. Call smp_processor_id() only once. Initialize c0_context to 0. Seems like it always was just coincidence that any SMP kernel ever worked ...

Index: smp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/smp.c,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- smp.c	28 Jan 2002 20:31:56 -0000	1.13
+++ smp.c	19 Feb 2002 17:57:11 -0000	1.14
@@ -83,8 +83,10 @@
  * Hook for doing final board-specific setup after the generic smp setup
  * is done
  */
-asmlinkage int start_secondary(void)
+asmlinkage void start_secondary(void)
 {
+	unsigned int cpu = smp_processor_id();
+
 	prom_init_secondary();
 
 	/* Do stuff that trap_init() did for the first processor */
@@ -95,16 +97,15 @@
 	/* XXX parity protection should be folded in here when it's converted to
 	   an option instead of something based on .cputype */
 
-	write_32bit_cp0_register(CP0_CONTEXT, smp_processor_id()<<23);
-	pgd_current[smp_processor_id()] = init_mm.pgd;
-	cpu_data[smp_processor_id()].udelay_val = loops_per_jiffy;
-	cpu_data[smp_processor_id()].asid_cache = ASID_FIRST_VERSION;
+	set_context(cpu << 23);
+	pgd_current[cpu] = init_mm.pgd;
+	cpu_data[cpu].udelay_val = loops_per_jiffy;
+	cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
 	prom_smp_finish();
 	printk("Slave cpu booted successfully\n");
-	CPUMASK_SETB(cpu_online_map, smp_processor_id());
+	CPUMASK_SETB(cpu_online_map, cpu);
 	atomic_inc(&cpus_booted);
 	cpu_idle();
-	return 0;
 }
 
 void __init smp_commence(void)