[Linux-mips-commits]CVS: linux/arch/mips/mm c-r3k.c,1.5,1.6

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv4046

Modified Files:
	c-r3k.c 
Log Message:
Fix flushing the cache for KUSEG/KSEG2.

Index: c-r3k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r3k.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- c-r3k.c	28 Nov 2001 17:28:31 -0000	1.5
+++ c-r3k.c	19 Feb 2002 17:37:17 -0000	1.6
@@ -107,11 +107,14 @@
 static void r3k_flush_icache_range(unsigned long start, unsigned long end)
 {
 	unsigned long size, i, flags;
-	volatile unsigned char *p = (char *)start;
+	volatile unsigned char *p;
 
 	size = end - start;
-	if (size > icache_size)
+	if (size > icache_size || KSEGX(start) != KSEG0) {
+		start = KSEG0;
 		size = icache_size;
+	}
+	p = (char *)start;
 
 	flags = read_32bit_cp0_register(CP0_STATUS);
 
@@ -161,11 +164,14 @@
 static void r3k_flush_dcache_range(unsigned long start, unsigned long end)
 {
 	unsigned long size, i, flags;
-	volatile unsigned char *p = (char *)start;
+	volatile unsigned char *p;
 
 	size = end - start;
-	if (size > dcache_size)
+	if (size > dcache_size || KSEGX(start) != KSEG0) {
+		start = KSEG0;
 		size = dcache_size;
+	}
+	p = (char *)start;
 
 	flags = read_32bit_cp0_register(CP0_STATUS);
 
@@ -331,9 +337,7 @@
 	_flush_icache_page = r3k_flush_icache_page;
 	_flush_icache_range = r3k_flush_icache_range;
 
-#ifdef CONFIG_NONCOHERENT_IO
 	_dma_cache_wback_inv = r3k_dma_cache_wback_inv;
-#endif /* CONFIG_NONCOHERENT_IO */
 
 	printk("Primary instruction cache %dkb, linesize %d bytes\n",
 		(int) (icache_size >> 10), (int) icache_lsize);