[Linux-mips-commits]CVS: linux/arch/mips/sibyte/swarm smp.c,1.5,1.6

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/sibyte/swarm
In directory usw-pr-cvs1:/tmp/cvs-serv3062

Modified Files:
	smp.c 
Log Message:
Initialize c0_context to 0. Seems like it always was just coincidence that any SMP kernel ever worked ...

Index: smp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/sibyte/swarm/smp.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- smp.c	28 Jan 2002 20:31:57 -0000	1.5
+++ smp.c	19 Feb 2002 17:35:33 -0000	1.6
@@ -38,10 +38,12 @@
 int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp)
 {
 	int retval;
+
 	if ((retval = cfe_start_cpu(1, &smp_bootstrap, sp, gp, 0)) != 0) {
 		printk("cfe_start_cpu returned %i\n" , retval);
 		panic("secondary bootstrap failed");
 	}
+
 	return 1;
 }
 
@@ -84,6 +86,7 @@
 {
 	int i;
 
+	set_context(0);
 	smp_num_cpus = prom_setup_smp();
 	init_new_context(current, &init_mm);
 	current->processor = 0;
@@ -147,5 +150,6 @@
 
 	/* Wait for everyone to come up */
 	while (atomic_read(&cpus_booted) != smp_num_cpus);
+
 	smp_threads_ready = 1;
 }