[Linux-mips-commits]CVS: linux/arch/mips64/mm c-sb1.c,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/mm
In directory usw-pr-cvs1:/tmp/cvs-serv18527

Modified Files:
	c-sb1.c 
Log Message:
Replace a few 32-bit add instructions with 64-bit dadd equivalents.

Index: c-sb1.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/mm/c-sb1.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- c-sb1.c	5 Feb 2002 17:03:53 -0000	1.2
+++ c-sb1.c	14 Feb 2002 20:48:25 -0000	1.3
@@ -25,16 +25,16 @@
 #include <asm/cpu.h>
 
 /* These are probed at ld_mmu time */
-static unsigned int icache_size;
-static unsigned int dcache_size;
+static unsigned long icache_size;
+static unsigned long dcache_size;
 
-static unsigned int icache_line_size;
-static unsigned int dcache_line_size;
+static unsigned long icache_line_size;
+static unsigned long dcache_line_size;
 
 static unsigned int icache_index_mask;
 
-static unsigned int icache_assoc;
-static unsigned int dcache_assoc;
+static unsigned long icache_assoc;
+static unsigned long dcache_assoc;
 
 static unsigned int icache_sets;
 static unsigned int dcache_sets;
@@ -75,7 +75,7 @@
 		"1:   cache  %3, 0($1)      \n" /* WB/Invalidate this index */
 		"     daddiu  %1, %1, -1     \n" /* Decrement loop count */
 		"     bnez   %1, 1b         \n" /* loop test */
-		"      addu   $1, $1, %0    \n" /* Next address */
+		"      daddu   $1, $1, %0    \n" /* Next address */
 		".set pop                   \n"
 		:
 		: "r" (dcache_line_size), "r" (dcache_sets * dcache_assoc),
@@ -100,7 +100,7 @@
 		"1:   cache  %3, 0($1)       \n" /* Invalidate this index */
 		"     daddiu  %1, %1, -1     \n" /* Decrement loop count */
 		"     bnez   %1, 1b         \n" /* loop test */
-		"      addu   $1, $1, %0    \n" /* Next address */
+		"      daddu   $1, $1, %0    \n" /* Next address */
 		".set pop                   \n"
 		:
 		: "r" (icache_line_size), "r" (icache_sets * icache_assoc),
@@ -130,7 +130,8 @@
  * The start/end arguments are expected to be Kseg addresses.
  */
 
-static void local_sb1_flush_icache_range(unsigned long start, unsigned long end)
+static void local_sb1_flush_icache_range(unsigned long start,
+	unsigned long end)
 {
 #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
 	unsigned long flags;
@@ -151,11 +152,11 @@
 #endif
 		"     cache  %3, 0($1)      \n" /* Hit-WB{,-inval} this address */
 		"     bne    $1, %1, 1b     \n" /* loop test */
-		"      addu  $1, $1, %2     \n" /* next line */
+		"      daddu  $1, $1, %2    \n" /* next line */
 		".set pop                   \n"
 		:
-		: "r" (start  & ~(dcache_line_size - 1)),
-		  "r" ((end - 1) & ~(dcache_line_size - 1)),
+		: "r" ((start + dcache_line_size - 1)  & ~(dcache_line_size - 1)),
+		  "r" ((end + dcache_line_size - 1) & ~(dcache_line_size - 1)),
 		  "r" (dcache_line_size),
 #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
 		  "i" (Hit_Writeback_Inv_D)
@@ -188,7 +189,7 @@
 		"     cache  %3, (2<<13)($1) \n" /* Index-inval this address */
 		"     cache  %3, (3<<13)($1) \n" /* Index-inval this address */
 		"     bne    $1, %1, 1b     \n" /* loop test */
-		"      addu  $1, $1, %2     \n" /* next line */
+		"      daddu  $1, $1, %2     \n" /* next line */
 		".set pop                   \n"
 		:
 		: "r" (start & ~(icache_line_size - 1)),
@@ -355,7 +356,7 @@
 		"1:   cache  %3, 0($1)      \n" /* Invalidate this index */
 		"     daddiu  %1, %1, -1     \n" /* Decrement loop count */
 		"     bnez   %1, 1b         \n" /* loop test */
-		"      addu   $1, $1, %0    \n" /* Next address */
+		"      daddu   $1, $1, %0    \n" /* Next address */
 		".set pop                   \n"
 		:
 		: "r" (icache_line_size), "r" (icache_sets * icache_assoc),