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[Linux-mips-commits]CVS: linux/arch/mips64/kernel Makefile,1.3,1.4 i8259.c,1.1,1.2 irq.c,1.3,1.4 smp.c,1.12,1.13 traps.c,1.11,1.12
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From: James S. <jsi...@us...> - 2002-01-28 20:32:31
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Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv7656/arch/mips64/kernel
Modified Files:
Makefile i8259.c irq.c smp.c traps.c
Log Message:
Big overhaul of 64-bit kernel along the lines of what we already have for the 64-bit kernel just more radical.
Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/Makefile,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- Makefile 2002/01/02 19:12:17 1.3
+++ Makefile 2002/01/28 20:31:57 1.4
@@ -13,7 +13,7 @@
O_TARGET := kernel.o
-export-objs = irq.o mips64_ksyms.o smp.o
+export-objs = irq.o mips64_ksyms.o pci-dma.o smp.o
obj-y := branch.o entry.o irq.o proc.o process.o ptrace.o r4k_cache.o \
r4k_fpu.o r4k_genex.o r4k_switch.o r4k_tlb.o r4k_tlb_debug.o \
@@ -27,6 +27,10 @@
obj-$(CONFIG_MIPS32_COMPAT) += linux32.o scall_o32.o signal32.o ioctl32.o
obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
obj-$(CONFIG_SMP) += smp.o
+
+ifndef CONFIG_MAPPED_PCI_IO
+obj-y += pci-dma.o
+endif
CFLAGS_r4k_genex.o := -P
CFLAGS_r4k_tlb_glue.o := -P
Index: i8259.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/i8259.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- i8259.c 2002/01/02 19:13:41 1.1
+++ i8259.c 2002/01/28 20:31:57 1.2
@@ -29,7 +29,7 @@
* moves to arch independent land
*/
-spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
static void end_8259A_irq (unsigned int irq)
{
Index: irq.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/irq.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- irq.c 2002/01/02 19:12:17 1.3
+++ irq.c 2002/01/28 20:31:57 1.4
@@ -20,7 +20,6 @@
#include <linux/mm.h>
#include <linux/random.h>
#include <linux/sched.h>
-#include <linux/seq_file.h>
#include <asm/atomic.h>
#include <asm/system.h>
@@ -75,31 +74,32 @@
* Generic, controller-independent functions:
*/
-int show_interrupts(struct seq_file *p, void *v)
+int get_irq_list(char *buf)
{
struct irqaction * action;
+ char *p = buf;
int i;
- seq_puts(p, " ");
+ p += sprintf(p, " ");
for (i=0; i < 1 /*smp_num_cpus*/; i++)
- seq_printf(p, "CPU%d ", i);
- seq_putc(p, '\n');
+ p += sprintf(p, "CPU%d ", i);
+ *p++ = '\n';
for (i = 0 ; i < NR_IRQS ; i++) {
action = irq_desc[i].action;
if (!action)
continue;
- seq_printf(p, "%3d: ",i);
- seq_printf(p, "%10u ", kstat_irqs(i));
- seq_printf(p, " %14s", irq_desc[i].handler->typename);
- seq_printf(p, " %s", action->name);
+ p += sprintf(p, "%3d: ",i);
+ p += sprintf(p, "%10u ", kstat_irqs(i));
+ p += sprintf(p, " %14s", irq_desc[i].handler->typename);
+ p += sprintf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
- seq_printf(p, ", %s", action->name);
- seq_putc(p, '\n');
+ p += sprintf(p, ", %s", action->name);
+ *p++ = '\n';
}
- seq_printf(p, "ERR: %10lu\n", irq_err_count);
- return 0;
+ p += sprintf(p, "ERR: %10lu\n", irq_err_count);
+ return p - buf;
}
#ifdef CONFIG_SMP
Index: smp.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/smp.c,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- smp.c 2002/01/02 19:12:17 1.12
+++ smp.c 2002/01/28 20:31:57 1.13
@@ -7,7 +7,6 @@
* Copyright (C) 2000, 2001 Ralf Baechle
* Copyright (C) 2000, 2001 Silicon Graphics, Inc.
*/
-#include <linux/cache.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -17,6 +16,7 @@
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/sched.h>
+#include <linux/cache.h>
#include <asm/atomic.h>
#include <asm/processor.h>
@@ -27,17 +27,23 @@
#include <asm/irq.h>
/* The 'big kernel lock' */
-static spinlock_t kernel_flag = SPIN_LOCK_UNLOCKED;
+spinlock_t kernel_flag __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED;
int smp_threads_ready; /* Not used */
atomic_t smp_commenced = ATOMIC_INIT(0);
struct cpuinfo_mips cpu_data[NR_CPUS];
+void (*volatile smp_cpu0_finalize)(void);
+
+// static atomic_t cpus_booted = ATOMIC_INIT(0);
+atomic_t cpus_booted = ATOMIC_INIT(0);
+
int smp_num_cpus = 1; /* Number that came online. */
cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
int __cpu_number_map[NR_CPUS];
int __cpu_logical_map[NR_CPUS];
cycles_t cacheflush_time;
-static void smp_tune_scheduling (void)
+// static void smp_tune_scheduling (void)
+void smp_tune_scheduling (void)
{
}
@@ -59,17 +65,6 @@
cpu_idle();
}
-void __init smp_boot_cpus(void)
-{
- extern void allowboot(void);
-
- init_new_context(current, &init_mm);
- current->processor = 0;
- init_idle();
- smp_tune_scheduling();
- allowboot();
-}
-
void __init smp_commence(void)
{
wmb();
@@ -151,7 +146,9 @@
void (*func) (void *info) = call_data->func;
void *info = call_data->info;
int wait = call_data->wait;
+ int cpu = smp_processor_id();
+ irq_enter(cpu, 0); /* XXX choose an irq number? */
/*
* Notify initiating CPU that I've grabbed the data and am
* about to execute the function.
@@ -167,15 +164,18 @@
mb();
atomic_inc(&call_data->finished);
}
+ irq_exit(cpu, 0); /* XXX choose an irq number? */
}
static void stop_this_cpu(void *dummy)
{
- /*
- * Remove this CPU
- * XXX update this from 32-bit version
- */
- for (;;);
+ int cpu = smp_processor_id();
+ if (cpu)
+ for (;;); /* XXX Use halt like i386 */
+
+ /* XXXKW this isn't quite there yet */
+ while (!smp_cpu0_finalize) ;
+ smp_cpu0_finalize();
}
void smp_send_stop(void)
Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- traps.c 2002/01/04 17:39:11 1.11
+++ traps.c 2002/01/28 20:31:57 1.12
@@ -565,7 +565,7 @@
{
extern char except_vec0;
extern char except_vec1_r10k;
- extern char except_vec2_generic;
+ extern char except_vec2_generic, except_vec2_sb1;
extern char except_vec3_generic, except_vec3_r4000;
extern char except_vec4;
extern void bus_error_init(void);
@@ -609,14 +609,18 @@
* Handling the following exceptions depends mostly of the cpu type
*/
switch(mips_cpu.cputype) {
- case CPU_R10000:
- /*
- * The R10000 is in most aspects similar to the R4400. It
- * should get some special optimizations.
- */
- write_32bit_cp0_register(CP0_FRAMEMASK, 0);
- goto r4k;
+ case CPU_SB1:
+#ifdef CONFIG_SB1_CACHE_ERROR
+ /* Special cache error handler for SB1 */
+ memcpy((void *)(KSEG0 + 0x100), &except_vec2_sb1, 0x80);
+ memcpy((void *)(KSEG1 + 0x100), &except_vec2_sb1, 0x80);
+#endif
+ /* Enable timer interrupt and scd mapped interrupt */
+ clear_cp0_status(0xf000);
+ set_cp0_status(0xc00);
+ break;
+ case CPU_R10000:
case CPU_R4000MC:
case CPU_R4400MC:
case CPU_R4000SC:
@@ -628,7 +632,6 @@
case CPU_R4600:
case CPU_R5000:
case CPU_NEVADA:
-r4k:
/* Debug TLB refill handler. */
memcpy((void *)KSEG0, &except_vec0, 0x80);
memcpy((void *)KSEG0 + 0x080, &except_vec1_r10k, 0x80);
@@ -664,7 +667,6 @@
* handlers.
*/
bus_error_init();
-
set_except_vector(8, handle_sys);
set_except_vector(9, handle_bp);
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