[Linux-mips-commits]CVS: linux/arch/mips/mm c-andes.c,1.2,1.3 c-mips32.c,1.1,1.2 c-r3k.c,1.3,1.4 c-r4k.c,1.1,1.2 c-r5432.c,1.4,1.5 c-r5900.c,1.1,1.2 c-rm7k.c,1.2,1.3 c-tx39.c,1.2,1.3 c-tx49.c,1.1,1.2

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv11706/arch/mips/mm

Modified Files:
	c-andes.c c-mips32.c c-r3k.c c-r4k.c c-r5432.c c-r5900.c 
	c-rm7k.c c-tx39.c c-tx49.c 
Log Message:
Report FPU revision in /proc/cpuinfo if enabled.  Handle c0 hazard in cpu_get_fpu_id().  Re-arrange CPU/FPU reporting code in one place. Report CPU & FPU type and version on startup.

Index: c-andes.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-andes.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- c-andes.c	2001/11/26 19:18:13	1.2
+++ c-andes.c	2001/11/27 17:53:47	1.3
@@ -94,8 +94,6 @@
 
 void __init ld_mmu_andes(void)
 {
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	printk("Primary instruction cache %dkb, linesize %d bytes\n",
 	       icache_size >> 10, ic_lsize);
 	printk("Primary data cache %dkb, linesize %d bytes\n",

Index: c-mips32.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-mips32.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- c-mips32.c	2001/10/23 17:20:14	1.1
+++ c-mips32.c	2001/11/27 17:53:47	1.2
@@ -674,8 +674,6 @@
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 #ifdef CONFIG_MIPS_UNCACHED
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
 #else

Index: c-r3k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r3k.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- c-r3k.c	2001/11/26 19:18:13	1.3
+++ c-r3k.c	2001/11/27 17:53:47	1.4
@@ -316,8 +316,6 @@
 {
 	unsigned long config;
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	_clear_page = r3k_clear_page;
 	_copy_page = r3k_copy_page;
 

Index: c-r4k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r4k.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- c-r4k.c	2001/10/23 17:20:14	1.1
+++ c-r4k.c	2001/11/27 17:53:47	1.2
@@ -1547,8 +1547,6 @@
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 #ifdef CONFIG_MIPS_UNCACHED
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
 #else

Index: c-r5432.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r5432.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- c-r5432.c	2001/11/06 00:30:42	1.4
+++ c-r5432.c	2001/11/27 17:53:47	1.5
@@ -455,8 +455,6 @@
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	change_cp0_config(CONF_CM_CMASK, CONF_CM_CACHABLE_NONCOHERENT);
 
 	probe_icache(config);

Index: c-r5900.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-r5900.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- c-r5900.c	2001/11/10 21:23:45	1.1
+++ c-r5900.c	2001/11/27 17:53:47	1.2
@@ -325,8 +325,6 @@
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	/*
 	 * Display CP0 config reg. to verify the workaround 
 	 * for branch prediction bug is done, or not.

Index: c-rm7k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-rm7k.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- c-rm7k.c	2001/10/26 22:11:25	1.2
+++ c-rm7k.c	2001/11/27 17:53:47	1.3
@@ -293,8 +293,6 @@
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 	unsigned long addr;
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
         change_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
 
 	/* RM7000 erratum #31. The icache is screwed at startup. */

Index: c-tx39.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-tx39.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- c-tx39.c	2001/10/24 23:32:54	1.2
+++ c-tx39.c	2001/11/27 17:53:47	1.3
@@ -273,8 +273,6 @@
 {
 	unsigned long config;
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	_clear_page = r3k_clear_page;
 	_copy_page = r3k_copy_page;
 

Index: c-tx49.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/c-tx49.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- c-tx49.c	2001/10/24 23:32:54	1.1
+++ c-tx49.c	2001/11/27 17:53:47	1.2
@@ -383,8 +383,6 @@
 {
 	unsigned long config = read_32bit_cp0_register(CP0_CONFIG);
 
-	printk("CPU revision is: %08x\n", read_32bit_cp0_register(CP0_PRID));
-
 	if (mips_configk0 != -1)
 		change_cp0_config(CONF_CM_CMASK, mips_configk0);
 	else