[Linux-mips-commits]CVS: linux/arch/mips/kernel proc.c,1.6,1.7 setup.c,1.33,1.34

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv11706/arch/mips/kernel

Modified Files:
	proc.c setup.c 
Log Message:
Report FPU revision in /proc/cpuinfo if enabled.  Handle c0 hazard in cpu_get_fpu_id().  Re-arrange CPU/FPU reporting code in one place. Report CPU & FPU type and version on startup.

Index: proc.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/proc.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- proc.c	2001/08/25 02:19:27	1.6
+++ proc.c	2001/11/27 17:53:47	1.7
@@ -59,14 +59,18 @@
 		mach_ite_names, mach_philips_names, mach_globespan_names,
 		mach_sibyte_names, mach_toshiba_names, mach_alchemy_names,
 		mach_nec_vr41xx_names};
-	unsigned int version = read_32bit_cp0_register(CP0_PRID);
+	unsigned int version = mips_cpu.processor_id;
+	unsigned int fp_vers = mips_cpu.fpu_id;
 	int len;
 
 	len = sprintf(buffer, "cpu\t\t\t: MIPS\n");
-	len += sprintf(buffer + len, "cpu model\t\t: %s V%d.%d\n",
+	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
+	        (mips_cpu.options & MIPS_CPU_FPU) ? "  FPU V%d.%d" : "");
+	len += sprintf(buffer + len, fmt,
 	               cpu_name[mips_cpu.cputype <= CPU_LAST ?
 	                        mips_cpu.cputype : CPU_UNKNOWN],
-	               (version >> 4) & 0x0f, version & 0x0f);
+	               (version >> 4) & 0x0f, version & 0x0f,
+	               (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
 	len += sprintf(buffer + len, "system type\t\t: %s %s\n",
 		       mach_group_names[mips_machgroup],
 		       mach_group_to_name[mips_machgroup][mips_machtype]);

Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.33
retrieving revision 1.34
diff -u -d -r1.33 -r1.34
--- setup.c	2001/11/27 17:37:52	1.33
+++ setup.c	2001/11/27 17:53:47	1.34
@@ -192,7 +192,7 @@
 	unsigned long tmp, fpu_id;
 
 	tmp = read_32bit_cp0_register(CP0_STATUS);
-	write_32bit_cp0_register(CP0_STATUS, tmp | ST0_CU1);
+	__enable_fpu();
 	fpu_id = read_32bit_cp1_register(CP1_REVISION);
 	write_32bit_cp0_register(CP0_STATUS, tmp);
 	return fpu_id;
@@ -207,7 +207,8 @@
 }
 
 /* declaration of the global struct */
-struct mips_cpu mips_cpu = {PRID_IMP_UNKNOWN, CPU_UNKNOWN, 0, 0, 0,
+struct mips_cpu mips_cpu = {PRID_IMP_UNKNOWN, FPIR_IMP_NONE, CPU_UNKNOWN,
+			    0, 0, 0,
 			    {0,0,0,0}, {0,0,0,0}, {0,0,0,0}, {0,0,0,0}};
 
 /* Shortcut for assembler access to mips_cpu.options */
@@ -530,6 +531,15 @@
 	default:
 		mips_cpu.cputype = CPU_UNKNOWN;
 	}
+	if (mips_cpu.options & MIPS_CPU_FPU)
+		mips_cpu.fpu_id = cpu_get_fpu_id();
+}
+
+static inline void cpu_report(void)
+{
+	printk("CPU revision is: %08x\n", mips_cpu.processor_id);
+	if (mips_cpu.options & MIPS_CPU_FPU)
+		printk("FPU revision is: %08x\n", mips_cpu.fpu_id);
 }
 
 asmlinkage void __init
@@ -545,6 +555,8 @@
 #ifdef CONFIG_SGI_IP22
 	sgi_sysinit();
 #endif
+
+	cpu_report();
 
 	/*
 	 * Determine the mmu/cache attached to this machine,