[Linux-mips-commits]CVS: linux/arch/mips/mm tlb-sb1.c,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv23666

Modified Files:
	tlb-sb1.c 
Log Message:
Move initialization of tlb_entries to tlb-sb1.c.  Delete lots of unused variables.

Index: tlb-sb1.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-sb1.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- tlb-sb1.c	2001/11/19 17:57:38	1.2
+++ tlb-sb1.c	2001/11/26 19:16:06	1.3
@@ -27,19 +27,7 @@
 #include <asm/cpu.h>
 
 /* These are probed at ld_mmu time */
-static unsigned int icache_size;
-static unsigned int dcache_size;
-
-static unsigned int icache_line_size;
-static unsigned int dcache_line_size;
 
-static unsigned int icache_index_mask;
-
-static unsigned int icache_assoc;
-static unsigned int dcache_assoc;
-
-static unsigned int icache_sets;
-static unsigned int dcache_sets;
 static unsigned int tlb_entries;
 
 /* Dump the current entry* and pagemask registers */
@@ -305,6 +293,11 @@
  */
 void sb1_tlb_init(void)
 {
+	u32 config1;
+
+	config1 = read_mips32_cp0_config1();
+	tlb_entries = ((config1 >> 25) & 0x3f) + 1;
+
 	/*
 	 * We don't know what state the firmware left the TLB's in, so this is
 	 * the ultra-conservative way to flush the TLB's and avoid machine