[Linux-mips-commits]CVS: linux/include/asm-mips bootinfo.h,1.13,1.14 pgtable.h,1.7,1.8

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv859/include/asm-mips

Modified Files:
	bootinfo.h pgtable.h 
Log Message:
Replace all references to mips_tlb_entries with mips_cpu.tlbsize. Eleminate remaining references to mips_memory_upper.

Index: bootinfo.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/bootinfo.h,v
retrieving revision 1.13
retrieving revision 1.14
diff -u -d -r1.13 -r1.14
--- bootinfo.h	2001/11/19 17:48:27	1.13
+++ bootinfo.h	2001/11/26 18:06:55	1.14
@@ -33,7 +33,8 @@
 #define MACH_GROUP_ALCHEMY     18 /* Alchemy Semi Eval Boards*/
 #define MACH_GROUP_NEC_VR41XX  19 /* NEC Vr41xx based boards/gadgets          */
 #define MACH_GROUP_HP_LASERJET 20 /* Hewlett Packard LaserJet */
-#define MACH_GROUP_EE          20 /* Emotion Engine (Sony PlayStation 2)      */	
+#define MACH_GROUP_EE          21 /* Emotion Engine (Sony PlayStation 2)      */
+
 #define GROUP_NAMES { "unknown", "Jazz", "Digital", "ARC", "SNI", "ACN",      \
 	"SGI", "Cobalt", "NEC DDB", "Baget", "Cosine", "Galileo", "Momentum", \
 	"ITE", "Philips", "Globepspan", "SiByte", "Toshiba", "Alchemy",       \
@@ -187,7 +188,7 @@
 #define MACH_PALLAS		0
 #define MACH_TOPAS		1
 #define MACH_JMR		2
-#define MACH_TOSHIBA_JMR3927	3	/* JMR-TX3927 CPU/IO board */
+#define MACH_TOSHIBA_JMR3927    3      /* JMR-TX3927 CPU/IO board */
 
 #define GROUP_TOSHIBA_NAMES { "Pallas", "TopasCE", "JMR", "JMR TX3927" }
 
@@ -312,7 +313,6 @@
  */
 extern unsigned long mips_machtype;
 extern unsigned long mips_machgroup;
-extern unsigned long mips_tlb_entries;
 
 /*
  * A memory map that's built upon what was determined

Index: pgtable.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/pgtable.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- pgtable.h	2001/10/31 17:28:54	1.7
+++ pgtable.h	2001/11/26 18:06:55	1.8
@@ -26,6 +26,9 @@
  *  - flush_cache_range(mm, start, end) flushes a range of pages
  *  - flush_page_to_ram(page) write back kernel page to ram
  *  - flush_icache_range(start, end) flush a range of instructions
+ *
+ *  - flush_cache_sigtramp() flush signal trampoline
+ *  - flush_icache_all() flush the entire instruction cache
  */
 extern void (*_flush_cache_all)(void);
 extern void (*___flush_cache_all)(void);
@@ -33,11 +36,12 @@
 extern void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
 				 unsigned long end);
 extern void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
-extern void (*_flush_cache_sigtramp)(unsigned long addr);
 extern void (*_flush_page_to_ram)(struct page * page);
 extern void (*_flush_icache_range)(unsigned long start, unsigned long end);
 extern void (*_flush_icache_page)(struct vm_area_struct *vma,
                                   struct page *page);
+extern void (*_flush_cache_sigtramp)(unsigned long addr);
+extern void (*_flush_icache_all)(void);
 
 #define flush_dcache_page(page)			do { } while (0)
 
@@ -46,12 +50,17 @@
 #define flush_cache_mm(mm)		_flush_cache_mm(mm)
 #define flush_cache_range(mm,start,end)	_flush_cache_range(mm,start,end)
 #define flush_cache_page(vma,page)	_flush_cache_page(vma, page)
-#define flush_cache_sigtramp(addr)	_flush_cache_sigtramp(addr)
 #define flush_page_to_ram(page)		_flush_page_to_ram(page)
 
 #define flush_icache_range(start, end)	_flush_icache_range(start,end)
 #define flush_icache_page(vma, page) 	_flush_icache_page(vma, page)
 
+#define flush_cache_sigtramp(addr)	_flush_cache_sigtramp(addr)
+#ifdef CONFIG_VTAG_ICACHE
+#define flush_icache_all()		_flush_icache_all()
+#else
+#define flush_icache_all()		do { } while(0)
+#endif
 
 /*
  * - add_wired_entry() add a fixed TLB entry, and move wired register