[Linux-mips-commits]CVS: linux/arch/mips/kernel setup.c,1.29,1.30

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv2019/mips/kernel

Modified Files:
	setup.c 
Log Message:
Set MIPS_CPU_MCHECK flag if machine check available.

Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/setup.c,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- setup.c	2001/11/19 18:31:01	1.29
+++ setup.c	2001/11/20 17:41:49	1.30
@@ -424,7 +424,8 @@
 			mips_cpu.isa_level = MIPS_CPU_ISA_M32;
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | 
-				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH;
+				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH |
+			                   MIPS_CPU_MCHECK;
 			config1 = read_mips32_cp0_config1();
 			if (config1 & (1 << 3))
 				mips_cpu.options |= MIPS_CPU_WATCH;
@@ -440,7 +441,8 @@
 			/* See comment above about querying options */
 			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX | 
 				           MIPS_CPU_4KTLB | MIPS_CPU_COUNTER | 
-				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH;
+				           MIPS_CPU_DIVEC | MIPS_CPU_WATCH |
+			                   MIPS_CPU_MCHECK;
 			config1 = read_mips32_cp0_config1();
 			if (config1 & (1 << 3))
 				mips_cpu.options |= MIPS_CPU_WATCH;
@@ -484,8 +486,9 @@
 		case PRID_IMP_SB1:
 			mips_cpu.cputype = CPU_SB1;
 			mips_cpu.isa_level = MIPS_CPU_ISA_M64;
-			mips_cpu.options = (MIPS_CPU_TLB | MIPS_CPU_4KEX |
-			                   MIPS_CPU_COUNTER | MIPS_CPU_DIVEC);
+			mips_cpu.options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+			                   MIPS_CPU_COUNTER | MIPS_CPU_DIVEC |
+			                   MIPS_CPU_MCHECK;
 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
 			/* FPU in pass1 is known to have issues. */
 			mips_cpu.options |= MIPS_CPU_FPU;