[Linux-mips-commits]CVS: linux/arch/mips64/kernel traps.c,1.5,1.6

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv32753/mips64/kernel

Modified Files:
	traps.c 
Log Message:
Setup machine check exception if available.

Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- traps.c	2001/10/27 17:28:54	1.5
+++ traps.c	2001/11/20 17:35:48	1.6
@@ -18,6 +18,7 @@
 
 #include <asm/branch.h>
 #include <asm/cachectl.h>
+#include <asm/cpu.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
 #include <asm/bootinfo.h>
@@ -42,6 +43,7 @@
 extern asmlinkage void handle_tr(void);
 extern asmlinkage void handle_fpe(void);
 extern asmlinkage void handle_watch(void);
+extern asmlinkage void handle_mcheck(void);
 extern asmlinkage void handle_reserved(void);
 
 static char *cpu_names[] = CPU_NAMES;
@@ -400,6 +402,13 @@
 	panic("Caught WATCH exception - probably caused by stack overflow.");
 }
 
+asmlinkage void do_mcheck(struct pt_regs *regs)
+{
+	show_regs(regs);
+	panic("Caught Machine Check exception - probably caused by multiple "
+	      "matching entries in the TLB.");
+}
+
 void do_reserved(struct pt_regs *regs)
 {
 	/*
@@ -516,6 +525,9 @@
 	setup_dedicated_int();
 	mips4_setup();
 	go_64();		/* In memoriam C128 ;-)  */
+
+	if (mips_cpu.options & MIPS_CPU_MCHECK)
+		set_except_vector(24, handle_mcheck);
 
 	/*
 	 * Handling the following exceptions depends mostly of the cpu type