Update of /cvsroot/linux-mips/linux/arch/mips/hp-lj In directory usw-pr-cvs1:/tmp/cvs-serv6428/arch/mips/hp-lj Added Files: Makefile asic.c gdb_hook.c init.c int-handler.S irq.c pci-dma.c pci.c setup.c utils.c utils.h Log Message: HP Laserjet support. --- NEW FILE: Makefile --- # # Makefile for the HP specific kernel interface routines # under Linux. # # Note! Dependencies are done automagically by 'make dep', which also # removes any old dependencies. DON'T put your own dependencies here # unless it's something special (ie not a .c file). # .S.o: $(CC) $(CFLAGS) -c $< -o $*.o all: hp-lj.o O_TARGET := hp-lj.o export-objs := utils.o obj-y := init.o setup.o irq.o int-handler.o pci.o utils.o asic.o obj-$(CONFIG_REMOTE_DEBUG) += gdb_hook.o obj-$(CONFIG_DIRECT_PRINTK) += gdb_hook.o obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o clean: rm *.o forceit: # package filesystem from rootfs directory into binary package romfs.bin: forceit ./rootfs @genromfs -d ./rootfs -f $@ # transform rootfs.bin into object file format for linking initrd.o: romfs.bin @echo "" | $(CROSS_COMPILE)as -o $@ @$(CROSS_COMPILE)objcopy --add-section .initrd=$< $@ include $(TOPDIR)/Rules.make .PHONY: forceit --- NEW FILE: asic.c --- #include "asm/hp-lj/asic.h" AsicId GetAsicId(void) { static int asic = IllegalAsic; if (asic == IllegalAsic) { if (*(unsigned int *)0xbff70000 == 0x1114103c) asic = HarmonyAsic; else if (*(unsigned int *)0xbff80000 == 0x110d103c) asic = AndrosAsic; else asic = UnknownAsic; } return asic; } const char* const GetAsicName(void) { static const char* const Names[] = { "Illegal", "Unknown", "Andros", "Harmony" }; return Names[(int)GetAsicId()]; } --- NEW FILE: gdb_hook.c --- /* * Carsten Langgaard, car...@mi... * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. * * ######################################################################## * * This program is free software; you can distribute it and/or modify it * under the terms of the GNU General Public License (Version 2) as * published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. * * ######################################################################## * * This is the interface to the remote debugger stub. * */ #include <linux/config.h> #include <linux/serialP.h> #include <linux/serial_reg.h> #include <asm/serial.h> #include <asm/io.h> #include <asm/hp-lj/asic.h> int putDebugChar(char c); char getDebugChar(void); /////////////////////// andros values /////////////////////////////////////////////////////// #define SERIAL_REG(offset) (*((volatile unsigned int*)(HPSR_BASE_ADDR|offset))) // Register set base address #define HPSR_BASE_ADDR 0xbfe00000UL // Transmit / Receive Data #define HPSR_DATA_OFFSET 0x00020010UL // Transmit control / status #define HPSR_TX_STAT_OFFSET 0x0002000CUL // Receive status #define HPSR_RX_STAT_OFFSET 0x00020008UL #define HPSR_TX_STAT_READY 0x8UL #define HPSR_RX_DATA_AVAIL 0x4UL /////////////////////// harmony values /////////////////////////////////////////////////////// // Transmit / Receive Data #define H_HPSR_DATA_TX *((volatile unsigned int*)0xbff65014) // Transmit / Receive Data #define H_HPSR_DATA_RX *((volatile unsigned int*)0xbff65018) // Status #define H_HPSR_STAT *((volatile unsigned int*)0xbff65004) // harmony serial status bits #define H_SER_STAT_TX_EMPTY 0x04 #define H_SER_STAT_RX_EMPTY 0x10 int putDebugChar(char c) { if (GetAsicId() == HarmonyAsic) { while (!( ( (H_HPSR_STAT) & H_SER_STAT_TX_EMPTY) != 0)); H_HPSR_DATA_TX = (unsigned int) c; } else if (GetAsicId() == AndrosAsic) { while (((SERIAL_REG(HPSR_TX_STAT_OFFSET) & HPSR_TX_STAT_READY) == 0)) ; SERIAL_REG(HPSR_DATA_OFFSET) = (unsigned int) c; } return 1; } char getDebugChar(void) { if (GetAsicId() == HarmonyAsic) { while (!(((H_HPSR_STAT) & H_SER_STAT_RX_EMPTY) == 0)); return H_HPSR_DATA_RX; } else if (GetAsicId() == AndrosAsic) { while ((SERIAL_REG(HPSR_RX_STAT_OFFSET) & HPSR_RX_DATA_AVAIL) == 0) ; return (SERIAL_REG(HPSR_DATA_OFFSET)); } } --- NEW FILE: init.c --- /* * init.c: PROM library initialisation code. * * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov * * $Id: init.c,v 1.1 2001/11/19 18:31:01 jsimmons Exp $ */ #include <linux/mm.h> #include <asm/bootinfo.h> #include <asm/addrspace.h> #include <asm/hp-lj/asic.h> #include <linux/bootmem.h> #include "utils.h" #define Delimiter "CMDLINE=" const char CommandLine[] = Delimiter "root=/dev/hda3 "; char arcs_cmdline[COMMAND_LINE_SIZE]; int __init prom_init(int argc, char ** argv, char **envp) { ulong mem_size = get_mem_avail(); int reserve_size = 0; printk("Total Memory: %ld bytes\n", mem_size); reserve_buffer(CommandLine, mem_size); reserve_size = get_reserved_buffer_size(); mem_size -= reserve_size; add_memory_region(0x0,mem_size, BOOT_MEM_RAM); add_memory_region(mem_size,reserve_size, BOOT_MEM_RESERVED); printk("Main Memory: %ld bytes\n", mem_size); printk("Reserved Memory: %ld bytes at 0x%08x\n", get_reserved_buffer_size(), (ulong)get_reserved_buffer()); printk("Detected %s ASIC\n", GetAsicName()); mips_machgroup = MACH_GROUP_HP_LASERJET; mips_machtype = MACH_UNKNOWN; strcpy(arcs_cmdline, CommandLine+strlen(Delimiter)); return 0; } void prom_free_prom_memory (void) { } --- NEW FILE: int-handler.S --- #include <asm/asm.h> #include <asm/mipsregs.h> #include <asm/regdef.h> #include <asm/stackframe.h> .text .set mips1 .set reorder .set macro .set noat .align 5 # MIPS has 16 exception vectors numbered 0 to 15 # vector number 0 is for interrupts and the others are for various exceptions # The following code is installed as the handler for exception 0 # There are 8 possible interrupts that can cause this exception. # The cause register indicates which are pending # The status register indicates which are enabled # This code segment basically will decipher which interrup occurred (7 downto 0) # and pass an integer indicating which was the highest priority pending interrupt # to the do_IRQ routine. NESTED(hpIRQ, PT_SIZE, sp) SAVE_ALL CLI # Important: mark KERNEL mode ! /* * Get pending interrupts */ mfc0 t0,CP0_CAUSE # get pending interrupts mfc0 t1,CP0_STATUS # get enabled interrupts and t0,t1 # isolate allowed ones andi t0,0xff00 # isolate pending bits sll t0,16 # shift the pending bits down beqz t0,3f # no pending intrs, then spurious nop # delay slot /* * Find irq with highest priority * FIXME: This is slow - use binary search */ la a0,7 1: bltz t0,2f # found pending irq subu a0,1 sll t0,1 b 1b nop # delay slot call_do_IRQ: 2: move a1,sp jal do_IRQ nop # delay slot j ret_from_irq /* mfc0 t0,CP0_STATUS # disable interrupts ori t0,1 xori t0,1 mtc0 t0,CP0_STATUS la a1, ret_from_irq jr a1 */ 3: j spurious_interrupt END(hpIRQ) --- NEW FILE: irq.c --- /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Code to handle x86 style IRQs plus some generic interrupt stuff. * * Copyright (C) 1992 Linus Torvalds * Copyright (C) 1994 - 2000 Ralf Baechle */ #include <linux/config.h> #include <linux/init.h> #include <linux/irq.h> #include <asm/mipsregs.h> #include <asm/system.h> #include <asm/gdb-stub.h> /* install the handler for exception 0 */ void __init init_IRQ(void) { extern void hpIRQ(void); extern void mips_cpu_irq_init(u32 base); mips_cpu_irq_init(0); set_except_vector(0, hpIRQ); #ifdef CONFIG_REMOTE_DEBUG { extern void breakpoint(void); extern int remote_debug; if (remote_debug) { set_debug_traps(); breakpoint(); } } #endif } --- NEW FILE: pci-dma.c --- /* * Copyright (C) 2000 Ani Joshi <aj...@un...> * * * Dynamic DMA mapping support. * * swiped from i386, and cloned for MIPS by Geert. * */ #include <linux/types.h> #include <linux/mm.h> #include <linux/string.h> #include <linux/pci.h> #include <asm/io.h> void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle) { void *ret; int gfp = GFP_ATOMIC; if (hwdev == NULL || hwdev->dma_mask != 0xffffffff) gfp |= GFP_DMA; ret = (void *)__get_free_pages(gfp, get_order(size)); if (ret != NULL) { memset(ret, 0, size); *dma_handle = virt_to_bus(ret); // REVISIT this needs reviewal as mentioned in bug report // currently we bump kseg0 allocates to kseg1 uncacheable space if ((((unsigned int) ret) & 0xe0000000) == 0x80000000) { //flush the cache to eliminate coherency problems // and assure dirty lines won't later get written over any dma, etc. flush_cache_all(); ret = (void*)((unsigned int)ret | 0x20000000); } } return ret; } void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { free_pages((unsigned long)vaddr, get_order(size)); } --- NEW FILE: pci.c --- /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * SNI specific PCI support for RM200/RM300. * * Copyright (C) 1997 - 2000 Ralf Baechle */ #include <linux/config.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/types.h> #include <asm/byteorder.h> #include <asm/pci_channel.h> #include <asm/hp-lj/asic.h> #ifdef CONFIG_PCI volatile u32* pci_config_address_reg = (volatile u32*)0xfdead000; volatile u32* pci_config_data_reg = (volatile u32*)0xfdead000; #define cfgaddr(dev, where) (((dev->bus->number & 0xff) << 0x10) | \ ((dev->devfn & 0xff) << 0x08) | \ (where & 0xfc)) /* * We can't address 8 and 16 bit words directly. Instead we have to * read/write a 32bit word and mask/modify the data we actually want. */ static int pcimt_read_config_byte (struct pci_dev *dev, int where, unsigned char *val) { *pci_config_address_reg = cfgaddr(dev, where); *val = (le32_to_cpu(*pci_config_data_reg) >> ((where&3)<<3)) & 0xff; //printk("pci_read_byte 0x%x == 0x%x\n", where, *val); return PCIBIOS_SUCCESSFUL; } static int pcimt_read_config_word (struct pci_dev *dev, int where, unsigned short *val) { if (where & 1) return PCIBIOS_BAD_REGISTER_NUMBER; *pci_config_address_reg = cfgaddr(dev, where); *val = (le32_to_cpu(*pci_config_data_reg) >> ((where&3)<<3)) & 0xffff; //printk("pci_read_word 0x%x == 0x%x\n", where, *val); return PCIBIOS_SUCCESSFUL; } int pcimt_read_config_dword (struct pci_dev *dev, int where, unsigned int *val) { if (where & 3) return PCIBIOS_BAD_REGISTER_NUMBER; *pci_config_address_reg = cfgaddr(dev, where); *val = le32_to_cpu(*pci_config_data_reg); //printk("pci_read_dword 0x%x == 0x%x\n", where, *val); return PCIBIOS_SUCCESSFUL; } static int pcimt_write_config_byte (struct pci_dev *dev, int where, unsigned char val) { *pci_config_address_reg = cfgaddr(dev, where); *(volatile u8 *)(((int)pci_config_data_reg) + (where & 3)) = val; //printk("pci_write_byte 0x%x = 0x%x\n", where, val); return PCIBIOS_SUCCESSFUL; } static int pcimt_write_config_word (struct pci_dev *dev, int where, unsigned short val) { if (where & 1) return PCIBIOS_BAD_REGISTER_NUMBER; *pci_config_address_reg = cfgaddr(dev, where); *(volatile u16 *)(((int)pci_config_data_reg) + (where & 2)) = le16_to_cpu(val); //printk("pci_write_word 0x%x = 0x%x\n", where, val); return PCIBIOS_SUCCESSFUL; } int pcimt_write_config_dword (struct pci_dev *dev, int where, unsigned int val) { if (where & 3) return PCIBIOS_BAD_REGISTER_NUMBER; *pci_config_address_reg = cfgaddr(dev, where); *pci_config_data_reg = le32_to_cpu(val); //printk("pci_write_dword 0x%x = 0x%x\n", where, val); return PCIBIOS_SUCCESSFUL; } struct pci_ops hp_pci_ops = { pcimt_read_config_byte, pcimt_read_config_word, pcimt_read_config_dword, pcimt_write_config_byte, pcimt_write_config_word, pcimt_write_config_dword }; struct pci_channel mips_pci_channels[] = { { &hp_pci_ops, &ioport_resource, &iomem_resource }, { NULL, NULL, NULL } }; unsigned __init int pcibios_assign_all_busses(void) { return 1; } void __init pcibios_fixup(void) { } void __init pcibios_fixup_irqs(void) { struct pci_dev *dev; int slot_num; pci_for_each_dev(dev) { slot_num = PCI_SLOT(dev->devfn); switch(slot_num) { case 2: dev->irq = 3; break; case 3: dev->irq = 4; break; case 4: dev->irq = 5; break; default: break; } } } #define IO_MEM_LOGICAL_START 0x3e000000 #define IO_MEM_LOGICAL_END 0x3fefffff #define IO_PORT_LOGICAL_START 0x3ff00000 #define IO_PORT_LOGICAL_END 0x3fffffff #define IO_MEM_VIRTUAL_OFFSET 0xb0000000 #define IO_PORT_VIRTUAL_OFFSET 0xb0000000 #define ONE_MEG (1024 * 1024) void __init pci_setup(void) { u32 pci_regs_base_offset = 0xfdead000; switch(GetAsicId()) { case AndrosAsic: pci_regs_base_offset = 0xbff80000; break; case HarmonyAsic: pci_regs_base_offset = 0xbff70000; break; default: printk("ERROR: PCI does not support %s Asic\n", GetAsicName()); while(1); break; } // set bus stat/command reg // REVIST this setting may need vary depending on the hardware *((volatile unsigned int*)(pci_regs_base_offset | 0x0004)) = 0x38000007; iomem_resource.start = IO_MEM_LOGICAL_START + IO_MEM_VIRTUAL_OFFSET; iomem_resource.end = IO_MEM_LOGICAL_END + IO_MEM_VIRTUAL_OFFSET; ioport_resource.start = IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET; ioport_resource.end = IO_PORT_LOGICAL_END + IO_PORT_VIRTUAL_OFFSET; // KLUDGE (mips_io_port_base is screwed up, we've got to work around it here) // by letting both low (illegal) and high (legal) addresses appear in pci io space ioport_resource.start = 0x0; mips_io_port_base = IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET; printk("Set IO port base to 0x%lx\n", mips_io_port_base); // map the PCI address space // global map - all levels & processes can access // except that the range is outside user space // parameters: lo0, lo1, hi, pagemask // lo indicates physical page, hi indicates virtual address add_wired_entry((IO_MEM_LOGICAL_START >> 6) | 0x17, ((IO_MEM_LOGICAL_START + (16 * ONE_MEG)) >> 6) | 0x17, 0xee000000, PM_16M); // These are used in pci r/w routines so need to preceed bus scan pci_config_data_reg = (u32*) (((u32)mips_io_port_base) | 0xcfc); pci_config_address_reg = (u32*) (((u32)pci_regs_base_offset) | 0xcf8); } void __init pcibios_fixup_resources(struct pci_dev *dev) { int pos; int bases; printk("adjusting pci device: %s\n", dev->name); switch (dev->hdr_type) { case PCI_HEADER_TYPE_NORMAL: bases = 6; break; case PCI_HEADER_TYPE_BRIDGE: bases = 2; break; case PCI_HEADER_TYPE_CARDBUS: bases = 1; break; default: bases = 0; break; } for (pos=0; pos < bases; pos++) { struct resource* res = &dev->resource[pos]; if (res->start >= IO_MEM_LOGICAL_START && res->end <= IO_MEM_LOGICAL_END) { res->start += IO_MEM_VIRTUAL_OFFSET; res->end += IO_MEM_VIRTUAL_OFFSET; } if (res->start >= IO_PORT_LOGICAL_START && res->end <= IO_PORT_LOGICAL_END) { res->start += IO_PORT_VIRTUAL_OFFSET; res->end += IO_PORT_VIRTUAL_OFFSET; } } } #endif /* CONFIG_PCI */ --- NEW FILE: setup.c --- /* $Id: setup.c,v 1.1 2001/11/19 18:31:01 jsimmons Exp $ * * Setup pointers to hardware-dependent routines. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1996, 1997, 1998 by Ralf Baechle */ #include <linux/config.h> #include <linux/hdreg.h> #include <linux/init.h> #include <linux/mm.h> #include <asm/irq.h> #include <asm/time.h> #include <linux/irq.h> #include <linux/ide.h> #include <linux/interrupt.h> #include <linux/bootmem.h> #include <asm/mc146818rtc.h> #include <asm/reboot.h> #include <asm/hp-lj/asic.h> #include "utils.h" #ifdef CONFIG_REMOTE_DEBUG int remote_debug = 0; #endif static void (*timer_interrupt_service)(int irq, void *dev_id, struct pt_regs * regs) = NULL; static void andros_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) { if (!(*((volatile unsigned int*)0xbfea0010) & 0x20)) // mask = pend & en return; /* clear timer interrupt */ { unsigned int tmr = *((volatile unsigned int*)0xbfe90040); // ctl bits *((volatile unsigned int*)0xbfe90040) = tmr; // write to ack *((volatile unsigned int*)0xbfea000c) = 0x20; // sys int ack } /* service interrupt */ timer_interrupt_service(irq, dev_id, regs); } static void harmony_timer_interrupt(int irq, void *dev_id, struct pt_regs * regs) { if (!(*((volatile unsigned int*)0xbff63000) & 0x01)) return; // big sys int reg, 01-timer did it if (!(*((volatile unsigned int*)0xbff610a4) & 0x01)) return; // local small int reg, 01-timer0 did it *((volatile unsigned int*)0xbff610a4) = 1; // ack local timer0 bit *((volatile unsigned int*)0xbff63000) = 1; // ack global timer bit /* service interrupt */ timer_interrupt_service(irq, dev_id, regs); } #define ASIC_IRQ_NUMBER 2 static void __init hp_time_init(struct irqaction *irq) { timer_interrupt_service = irq->handler; if (GetAsicId() == AndrosAsic) { //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler *((volatile unsigned int*)0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control *((volatile unsigned int*)0xbfe90048) = 0x09; // 09-reload val // reload *((volatile unsigned int*)0xbfe90044) = 0x09; // 09-count val // count *((volatile unsigned int*)0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack irq->handler = andros_timer_interrupt; irq->flags |= SA_INTERRUPT | SA_SHIRQ; printk("setting up timer in hp_time_init\n"); setup_irq(ASIC_IRQ_NUMBER, irq); // enable timer interrupt *((volatile unsigned int*)0xbfea0000) = 0x20; } else if (GetAsicId() == HarmonyAsic) { *((volatile unsigned int*)0xbff61000) = 99; // prescaler, 100Mz sys clk *((volatile unsigned int*)0xbff61028) = 0x09; // reload reg *((volatile unsigned int*)0xbff61024) = 0x09; // count reg *((volatile unsigned int*)0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en irq->handler = harmony_timer_interrupt; irq->flags |= SA_INTERRUPT | SA_SHIRQ; setup_irq(ASIC_IRQ_NUMBER, irq); *((volatile unsigned int*)0xbff610a0) |= 1; // turn on timer0 } else if (GetAsicId() == UnknownAsic) printk("Unknown asic in hp_time_init()\n"); else printk("Unsupported asic in hp_time_init()\n"); } static void hplj_restart(void) { if (GetAsicId() == AndrosAsic) *((volatile unsigned int *) 0xbfe900c0) = 0; if (GetAsicId() == HarmonyAsic) *((volatile unsigned int *) 0xbff62030) = 0; printk("Restart Failed ... halting instead\n"); while(1); } static void hplj_halt(void) { while(1); } void __init hp_setup(void) { #ifdef CONFIG_PCI extern void pci_setup(void); pci_setup(); #endif #ifdef CONFIG_IDE { extern struct ide_ops std_ide_ops; ide_ops = &std_ide_ops; } #endif _machine_restart =(void (*)(char *)) hplj_restart; _machine_halt = hplj_halt; _machine_power_off = hplj_halt; board_timer_setup = hp_time_init; #ifdef CONFIG_REMOTE_DEBUG { extern char CommandLine[]; remote_debug = (strstr(CommandLine, "kgdb") != NULL); } #endif printk("HP SETUP\n"); } int __init page_is_ram(unsigned long pagenr) { return 1; } --- NEW FILE: utils.c --- /* * * * * */ #include <linux/config.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/string.h> #include <linux/module.h> #include <asm/io.h> #include "utils.h" #define miu_chan_cfg(x) ((volatile unsigned long *)(0xbff40000+x*4)) /* for andros */ int mbsize[8] = {1,2,4,8,16,32,64,128}; unsigned long get_mem_avail(void) { unsigned long cfg[10],i,total_mem=0; for(i=0;i<10;i++) cfg[i] = *miu_chan_cfg(i); for(i=0;i<10;i++){ if(cfg[i]==0x1fc160c2) continue; // skip empties if( ( (cfg[i]>>12) & 0xf ) <= 0xb ) continue; // skip roms total_mem += mbsize[(cfg[i]>>16)&0x7] *1024*1024; } return total_mem; } static ulong* buffer_ptr = NULL; static ulong buffer_size = 0; ulong* get_reserved_buffer(void) {return KSEG0ADDR(buffer_ptr);} ulong* get_reserved_buffer_virtual(void) {return (ulong*)ReservedMemVirtualAddr;} ulong get_reserved_buffer_size(void) {return buffer_size;} #define MIN_GEN_MEM (4 << 20) void reserve_buffer(const char* cl, ulong base_mem) { char* pos = strstr(cl, "reserved_buffer="); if (pos) { buffer_size = simple_strtol(pos+strlen("reserved_buffer="), 0, 10); buffer_size <<= 20; if (buffer_size + MIN_GEN_MEM > base_mem) buffer_size = base_mem - MIN_GEN_MEM; if (buffer_size > 0) buffer_ptr = (ulong*)(base_mem - buffer_size); else buffer_size = 0; } } EXPORT_SYMBOL(get_reserved_buffer); EXPORT_SYMBOL(get_reserved_buffer_virtual); EXPORT_SYMBOL(get_reserved_buffer_size); --- NEW FILE: utils.h --- /* * * * */ #include <linux/types.h> #define ReservedMemVirtualAddr 0x50000000 unsigned long get_mem_avail(void); ulong* get_reserved_buffer(void); ulong* get_reserved_buffer_virtual(void); ulong get_reserved_buffer_size(void); void reserve_buffer(const char* cl, ulong base_mem); |