[Linux-mips-commits]CVS: linux/arch/mips/korva irq_cpu.c,1.1,1.2 irq_korva.c,1.4,1.5 setup.c,1.4,1.5

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/korva
In directory usw-pr-cvs1:/tmp/cvs-serv12226

Modified Files:
	irq_cpu.c irq_korva.c setup.c 
Log Message:
Moved over to the macros in asm/debug.h

Index: irq_cpu.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/korva/irq_cpu.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- irq_cpu.c	2001/08/23 19:13:56	1.1
+++ irq_cpu.c	2001/10/30 21:43:37	1.2
@@ -27,16 +27,16 @@
 #include <asm/mipsregs.h>
 
 /* [jsun] sooner or later we should move this debug stuff to MIPS common */
-#include <asm/ddb5xxx/debug.h>
+#include <asm/debug.h>
 
 static int mips_cpu_irq_base=-1;
 
 static void 
 mips_cpu_irq_enable(unsigned int irq)
 {
-	MIPS_ASSERT(mips_cpu_irq_base != -1);
-	MIPS_ASSERT(irq >= mips_cpu_irq_base);
-	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+	db_assert(mips_cpu_irq_base != -1);
+	db_assert(irq >= mips_cpu_irq_base);
+	db_assert(irq < mips_cpu_irq_base+8);
 
 	clear_cp0_cause( 1 << (irq - mips_cpu_irq_base + 8));
 	set_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
@@ -45,9 +45,9 @@
 static void 
 mips_cpu_irq_disable(unsigned int irq)
 {
-	MIPS_ASSERT(mips_cpu_irq_base != -1);
-	MIPS_ASSERT(irq >= mips_cpu_irq_base);
-	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+	db_assert(mips_cpu_irq_base != -1);
+	db_assert(irq >= mips_cpu_irq_base);
+	db_assert(irq < mips_cpu_irq_base+8);
 
 	clear_cp0_status(1 << (irq - mips_cpu_irq_base + 8));
 }
@@ -63,9 +63,9 @@
 static void
 mips_cpu_irq_ack(unsigned int irq)
 {
-	MIPS_ASSERT(mips_cpu_irq_base != -1);
-	MIPS_ASSERT(irq >= mips_cpu_irq_base);
-	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+	db_assert(mips_cpu_irq_base != -1);
+	db_assert(irq >= mips_cpu_irq_base);
+	db_assert(irq < mips_cpu_irq_base+8);
 
 	/* although we attemp to clear the IP bit in cause reigster, I think
 	 * usually it is cleared by device (irq source)
@@ -79,9 +79,9 @@
 static void
 mips_cpu_irq_end(unsigned int irq)
 {
-	MIPS_ASSERT(mips_cpu_irq_base != -1);
-	MIPS_ASSERT(irq >= mips_cpu_irq_base);
-	MIPS_ASSERT(irq < mips_cpu_irq_base+8);
+	db_assert(mips_cpu_irq_base != -1);
+	db_assert(irq >= mips_cpu_irq_base);
+	db_assert(irq < mips_cpu_irq_base+8);
 	mips_cpu_irq_enable(irq);
 }
 

Index: irq_korva.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/korva/irq_korva.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- irq_korva.c	2001/10/30 19:12:37	1.4
+++ irq_korva.c	2001/10/30 21:43:37	1.5
@@ -23,7 +23,7 @@
 #include <asm/mipsregs.h>
 
 /* [jsun] sooner or later we should move this debug stuff to MIPS common */
-#include <asm/ddb5xxx/debug.h>
+#include <asm/debug.h>
 
 #define		NUM_KORVA_IRQS		5
 
@@ -32,9 +32,9 @@
 static void 
 korva_irq_enable(unsigned int irq)
 {
-	MIPS_ASSERT(korva_irq_base != -1);
-	MIPS_ASSERT(irq >= korva_irq_base);
-	MIPS_ASSERT(irq < korva_irq_base+NUM_KORVA_IRQS);
+	db_assert(korva_irq_base != -1);
+	db_assert(irq >= korva_irq_base);
+	db_assert(irq < korva_irq_base+NUM_KORVA_IRQS);
 
 	irq -= korva_irq_base;
 	korva_out32(KORVA_S_IMR, korva_in32(KORVA_S_IMR) | (1 << irq) );
@@ -43,9 +43,9 @@
 static void 
 korva_irq_disable(unsigned int irq)
 {
-	MIPS_ASSERT(korva_irq_base != -1);
-	MIPS_ASSERT(irq >= korva_irq_base);
-	MIPS_ASSERT(irq < korva_irq_base+NUM_KORVA_IRQS);
+	db_assert(korva_irq_base != -1);
+	db_assert(irq >= korva_irq_base);
+	db_assert(irq < korva_irq_base+NUM_KORVA_IRQS);
 
 	irq -= korva_irq_base;
 	korva_out32(KORVA_S_IMR, korva_in32(KORVA_S_IMR) & ~(1 << irq) );

Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/korva/setup.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- setup.c	2001/10/17 20:30:09	1.4
+++ setup.c	2001/10/30 21:43:37	1.5
@@ -26,7 +26,7 @@
 #include <asm/time.h>
 
 #include <asm/korva.h>
-#include <asm/ddb5xxx/debug.h>
+#include <asm/debug.h>
 
 // #define	USE_CPU_TIMER	1	/* are we using cpu counter as timer */
 
@@ -48,7 +48,7 @@
 	s.iomem_base = (u8*)(KORVA_BASE_VIRT + KORVA_UARTDLL);
 	s.iomem_reg_shift = 2;
 	s.io_type = SERIAL_IO_MEM;
-	MIPS_VERIFY(early_serial_setup(&s), == 0);
+	db_verify(early_serial_setup(&s), == 0);
 }
 
 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
@@ -79,7 +79,7 @@
 
 void __init nec_korva_setup(void)
 {
-	MIPS_DEBUG(printk("nec_korva_setup() starts.\n"));
+	//MIPS_DEBUG(printk("nec_korva_setup() starts.\n"));
 
 #if defined(CONFIG_BLK_DEV_INITRD)
         ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);