[Linux-mips-commits]CVS: linux/arch/mips64/kernel process.c,1.2,1.3 setup.c,1.2,1.3 traps.c,1.4,1.5

[Paul M. <le...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv20204/arch/mips64/kernel

Modified Files:
	process.c setup.c traps.c 
Log Message:
Sync with OSS (except for sysmips, which is waiting to be tested first).



Index: process.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/process.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- process.c	2001/10/19 21:19:38	1.2
+++ process.c	2001/10/27 17:28:54	1.3
@@ -53,7 +53,7 @@
 {
 	/* Forget lazy fpu state */
 	if (IS_FPU_OWNER()) {
-		set_cp0_status(ST0_CU1, ST0_CU1);
+		set_cp0_status(ST0_CU1);
 		__asm__ __volatile__("cfc1\t$0,$31");
 		CLEAR_FPU_OWNER();
 	}
@@ -63,7 +63,7 @@
 {
 	/* Forget lazy fpu state */
 	if (IS_FPU_OWNER()) {
-		set_cp0_status(ST0_CU1, ST0_CU1);
+		set_cp0_status(ST0_CU1);
 		__asm__ __volatile__("cfc1\t$0,$31");
 		CLEAR_FPU_OWNER();
 	}

Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/setup.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- setup.c	2001/07/24 17:03:46	1.2
+++ setup.c	2001/10/27 17:28:54	1.3
@@ -97,6 +97,7 @@
 
 extern void ip22_setup(void);
 extern void ip27_setup(void);
+extern void ip32_setup(void);
 
 static inline void cpu_probe(void)
 {
@@ -143,6 +144,9 @@
 #endif
 #ifdef CONFIG_SGI_IP27
 	ip27_setup();
+#endif
+#ifdef CONFIG_SGI_IP32
+	ip32_setup();
 #endif
 
 #ifdef CONFIG_ARC_MEMORY

Index: traps.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/kernel/traps.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- traps.c	2001/09/13 16:59:16	1.4
+++ traps.c	2001/10/27 17:28:54	1.5
@@ -441,7 +441,7 @@
 	switch(mips_cputype) {
 	case CPU_NEVADA:
 		memcpy((void *)(KSEG0 + 0x200), except_vec4, 8);
-		set_cp0_cause(CAUSEF_IV, CAUSEF_IV);
+		set_cp0_cause(CAUSEF_IV);
 		dedicated_iv_available = 1;
 	}
 }
@@ -473,7 +473,7 @@
 	case CPU_R8000:
 	case CPU_R10000:
 		mips4_available = 1;
-		set_cp0_status(ST0_XX, ST0_XX);
+		set_cp0_status(ST0_XX);
 	}
 }
 
@@ -482,7 +482,7 @@
 	unsigned int bits;
 
 	bits = ST0_KX|ST0_SX|ST0_UX;
-	set_cp0_status(bits, bits);
+	set_cp0_status(bits);
 	printk("Entering 64-bit mode.\n");
 }
 
@@ -496,7 +496,7 @@
 	unsigned long i;
 
 	/* Some firmware leaves the BEV flag set, clear it.  */
-	set_cp0_status(ST0_BEV, 0);
+	clear_cp0_status(ST0_BEV);
 
 	/* Copy the generic exception handler code to it's final destination. */
 	memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
@@ -527,7 +527,7 @@
 		 * should get some special optimizations.
 		 */
 		write_32bit_cp0_register(CP0_FRAMEMASK, 0);
-		set_cp0_status(ST0_XX, ST0_XX);
+		set_cp0_status(ST0_XX);
 		goto r4k;
 
 	case CPU_R4000MC: