[Linux-mips-commits]CVS: linux/arch/mips/kernel Makefile,1.9,1.10 entry.S,1.7,1.8

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv1201

Modified Files:
	Makefile entry.S 
Log Message:
Fix assembler flags and .set mipsX statements.

Index: Makefile
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/Makefile,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- Makefile	2001/10/22 19:16:44	1.9
+++ Makefile	2001/10/24 21:43:33	1.10
@@ -11,8 +11,6 @@
 .S.o:
 	$(CC) $(AFLAGS) -c $< -o $@
 
-EXTRA_AFLAGS = -mips3 -mcpu=r4000
-
 all:	kernel.o head.o init_task.o
 
 O_TARGET := kernel.o

Index: entry.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/entry.S,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- entry.S	2001/10/22 19:16:44	1.7
+++ entry.S	2001/10/24 21:43:33	1.8
@@ -118,7 +118,6 @@
 		END(except_vec1_generic)
 
 		NESTED(except_vec3_generic, 0, sp)
-		.set	mips0
 		mfc0	k1, CP0_CAUSE
 		la	k0, exception_handlers
 		andi	k1, k1, 0x7c
@@ -130,6 +129,7 @@
 
 		/* General exception vector R4000 version. */
 		NESTED(except_vec3_r4000, 0, sp)
+		.set    mips3
 		.set	noat
 		mfc0	k1, CP0_CAUSE
 		andi	k1, k1, 0x7c
@@ -150,7 +150,6 @@
 		 * line pointed to by c0_badvaddr because after return from
 		 * this exception handler the load / store will be re-executed.
 		 */
-		.set    mips3
 handle_vced:
 		mfc0	k0, CP0_BADVADDR
 		li	k1, -4
@@ -176,7 +175,7 @@
 		sw	k1, %lo(vcei_count)(k0)
 #endif
 		eret
-
+		.set    mips0
 		END(except_vec3_r4000)
 
 		__FINIT