[Linux-mips-commits]CVS: linux/arch/mips64/sgi-ip27 ip27-timer.c,1.1,1.2

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27
In directory usw-pr-cvs1:/tmp/cvs-serv12205/mips64/sgi-ip27

Modified Files:
	ip27-timer.c 
Log Message:
Fix load 1 problem.

Index: ip27-timer.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27/ip27-timer.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- ip27-timer.c	2001/08/22 18:19:17	1.1
+++ ip27-timer.c	2001/10/11 19:19:52	1.2
@@ -91,8 +91,9 @@
 {
 	int cpu = smp_processor_id();
 	int cpuA = ((cputoslice(cpu)) == 0);
-	int irq = 7;				/* XXX Assign number */
+	int irq = 9;				/* XXX Assign number */
 
+	irq_enter(cpu, irq);
 	write_lock(&xtime_lock);
 
 again:
@@ -109,19 +110,7 @@
 		do_timer(regs);
 
 #ifdef CONFIG_SMP
-	{
-		int user = user_mode(regs);
-
-		/*
-		 * update_process_times() expects us to have done irq_enter().
-		 * Besides, if we don't timer interrupts ignore the global
-		 * interrupt lock, which is the WrongThing (tm) to do.
-		 * Picked from i386 code.
-		 */
-		irq_enter(cpu, 0);
-		update_process_times(user);
-		irq_exit(cpu, 0);
-	}
+	update_process_times(user_mode(regs));
 #endif /* CONFIG_SMP */
 	
 	/*
@@ -145,6 +134,7 @@
         }
 
 	write_unlock(&xtime_lock);
+	irq_exit(cpu, irq);
 
 	if (softirq_pending(cpu))
 		do_softirq();