[Linux-mips-commits]CVS: linux/include/asm-mips au1000_dma.h,1.3,1.4

[Pete P. <pp...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv23816/include/asm-mips

Modified Files:
	au1000_dma.h 
Log Message:
Added gpio and touch screen driver (ts driver not yet tested).


Index: au1000_dma.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/au1000_dma.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- au1000_dma.h	2001/09/25 03:36:35	1.3
+++ au1000_dma.h	2001/10/10 21:56:15	1.4
@@ -32,20 +32,20 @@
 #define __ASM_AU1000_DMA_H
 
 #include <linux/config.h>
-#include <asm/io.h>			/* need byte IO */
-#include <linux/spinlock.h>		/* And spinlocks */
+#include <asm/io.h>		/* need byte IO */
+#include <linux/spinlock.h>	/* And spinlocks */
 #include <linux/delay.h>
 #include <asm/system.h>
 
 #define NUM_AU1000_DMA_CHANNELS	8
 
 /* DMA Channel Base Addresses */
-#define DMA_CHANNEL_BASE         0xB4002000
-#define DMA_CHANNEL_LEN          0x00000100
+#define DMA_CHANNEL_BASE	0xB4002000
+#define DMA_CHANNEL_LEN	0x00000100
 
 /* DMA Channel Register Offsets */
-#define DMA_MODE_SET              0x00000000
-#define DMA_MODE_CLEAR            0x00000004
+#define DMA_MODE_SET		0x00000000
+#define DMA_MODE_CLEAR		0x00000004
 /* DMA Mode register bits follow */
 #define DMA_DAH_MASK		(0x0f << 20)
 #define DMA_DID_BIT		16
@@ -80,32 +80,32 @@
 
 /* DMA Device ID's follow */
 enum {
-    DMA_ID_UART0_TX = 0,
-    DMA_ID_UART0_RX,
-    DMA_ID_GP04,
-    DMA_ID_GP05,
-    DMA_ID_AC97C_TX,
-    DMA_ID_AC97C_RX,
-    DMA_ID_UART3_TX,
-    DMA_ID_UART3_RX,
-    DMA_ID_USBDEV_EP0_RX,
-    DMA_ID_USBDEV_EP0_TX,
-    DMA_ID_USBDEV_EP2_TX,
-    DMA_ID_USBDEV_EP3_TX,
-    DMA_ID_USBDEV_EP4_RX,
-    DMA_ID_USBDEV_EP5_RX,
-    DMA_ID_I2S_TX,
-    DMA_ID_I2S_RX,
-    DMA_NUM_DEV
+	DMA_ID_UART0_TX = 0,
+	DMA_ID_UART0_RX,
+	DMA_ID_GP04,
+	DMA_ID_GP05,
+	DMA_ID_AC97C_TX,
+	DMA_ID_AC97C_RX,
+	DMA_ID_UART3_TX,
+	DMA_ID_UART3_RX,
+	DMA_ID_USBDEV_EP0_RX,
+	DMA_ID_USBDEV_EP0_TX,
+	DMA_ID_USBDEV_EP2_TX,
+	DMA_ID_USBDEV_EP3_TX,
+	DMA_ID_USBDEV_EP4_RX,
+	DMA_ID_USBDEV_EP5_RX,
+	DMA_ID_I2S_TX,
+	DMA_ID_I2S_RX,
+	DMA_NUM_DEV
 };
 
 struct dma_chan {
-    int dev_id; // this channel is allocated if >=0, free otherwise
-    unsigned int io;
-    int irq;
+	int dev_id;		// this channel is allocated if >=0, free otherwise
+	unsigned int io;
+	int irq;
 	const char *dev_str;
-    unsigned int fifo_addr;
-    unsigned int mode;
+	unsigned int fifo_addr;
+	unsigned int mode;
 };
 
 /* These are in arch/mips/au1000/common/dma.c */
@@ -113,29 +113,29 @@
 extern int request_au1000_dma(int dev_id, const char *dev_str);
 extern void free_au1000_dma(unsigned int dmanr);
 extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos,
-				 int length, int *eof, void *data);
+				int length, int *eof, void *data);
 extern void dump_au1000_dma_channel(unsigned int dmanr);
-extern spinlock_t  au1000_dma_spin_lock;
+extern spinlock_t au1000_dma_spin_lock;
 
 
 static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr)
 {
 	if (dmanr > NUM_AU1000_DMA_CHANNELS
 	    || au1000_dma_table[dmanr].dev_id < 0)
-	return NULL;
-    return &au1000_dma_table[dmanr];
+		return NULL;
+	return &au1000_dma_table[dmanr];
 }
 
 static __inline__ unsigned long claim_dma_lock(void)
 {
-    unsigned long flags;
-    spin_lock_irqsave(&au1000_dma_spin_lock, flags);
-    return flags;
+	unsigned long flags;
+	spin_lock_irqsave(&au1000_dma_spin_lock, flags);
+	return flags;
 }
 
 static __inline__ void release_dma_lock(unsigned long flags)
 {
-    spin_unlock_irqrestore(&au1000_dma_spin_lock, flags);
+	spin_unlock_irqrestore(&au1000_dma_spin_lock, flags);
 }
 
 /*
@@ -144,22 +144,22 @@
 static __inline__ void enable_dma_buffer0(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    outl_sync(DMA_BE0, chan->io + DMA_MODE_SET);
+	if (!chan)
+		return;
+	outl_sync(DMA_BE0, chan->io + DMA_MODE_SET);
 }
 static __inline__ void enable_dma_buffer1(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    outl_sync(DMA_BE1, chan->io + DMA_MODE_SET);
+	if (!chan)
+		return;
+	outl_sync(DMA_BE1, chan->io + DMA_MODE_SET);
 }
 static __inline__ void enable_dma_buffers(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 	outl_sync(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);
 }
 
@@ -167,39 +167,39 @@
 static __inline__ void enable_dma(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 
-    // set device FIFO address
+	// set device FIFO address
 	outl_sync(virt_to_phys((void *) chan->fifo_addr),
 		  chan->io + DMA_PERIPHERAL_ADDR);
 
 	outl_sync(chan->
 		  mode | (chan->dev_id << DMA_DID_BIT) | DMA_IE | DMA_GO,
-	      chan->io + DMA_MODE_SET);
+		  chan->io + DMA_MODE_SET);
 }
 
 #define DMA_HALT_POLL 0x5000
 
 static __inline__ void disable_dma(unsigned int dmanr)
 {
-    int i;
+	int i;
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 
 	outl_sync(DMA_D1 | DMA_D0 | DMA_GO, chan->io + DMA_MODE_CLEAR);
 
-    // poll the halt bit
-    for (i = 0; i < DMA_HALT_POLL; i++)
+	// poll the halt bit
+	for (i = 0; i < DMA_HALT_POLL; i++)
 		if (inl(chan->io + DMA_MODE_SET) & DMA_HALT)
-            break;
-    if (i == DMA_HALT_POLL) {
-        printk(KERN_INFO "disable_dma: HALT poll expired!\n");
-    } else {
-        // now we can disable the buffers
+			break;
+	if (i == DMA_HALT_POLL) {
+		printk(KERN_INFO "disable_dma: HALT poll expired!\n");
+	} else {
+		// now we can disable the buffers
 		outl_sync(~DMA_GO, chan->io + DMA_MODE_CLEAR);
-    }
+	}
 }
 
 
@@ -209,22 +209,22 @@
 static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    /*
-     * chan->mode only holds endianess, direction, transfer size, device
-     * FIFO width, and cacheability info for the channel. Make sure
-     * anything else is masked off.
-     */
+	if (!chan)
+		return;
+	/*
+	 * chan->mode only holds endianess, direction, transfer size, device
+	 * FIFO width, and cacheability info for the channel. Make sure
+	 * anything else is masked off.
+	 */
 	mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
-    chan->mode = mode;
+	chan->mode = mode;
 }
 
 static __inline__ int get_dma_active_buffer(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return -1;
+	if (!chan)
+		return -1;
 	return (inl(chan->io + DMA_MODE_SET) & DMA_AB) ? 1 : 0;
 }
 
@@ -238,11 +238,11 @@
 					 unsigned int a)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    
-    if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05)
-	return;
+	if (!chan)
+		return;
+
+	if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05)
+		return;
 
 	outl_sync(virt_to_phys((void *) a),
 		  chan->io + DMA_PERIPHERAL_ADDR);
@@ -254,15 +254,15 @@
 static __inline__ void clear_dma_done0(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 	outl_sync(DMA_D0, chan->io + DMA_MODE_CLEAR);
 }
 static __inline__ void clear_dma_done1(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 	outl_sync(DMA_D1, chan->io + DMA_MODE_CLEAR);
 }
 
@@ -279,8 +279,8 @@
 static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 	outl_sync(a, chan->io + DMA_BUFFER0_START);
 }
 
@@ -290,8 +290,8 @@
 static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
+	if (!chan)
+		return;
 	outl_sync(a, chan->io + DMA_BUFFER1_START);
 }
 
@@ -303,9 +303,9 @@
 				      unsigned int count)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    count &= DMA_COUNT_MASK;
+	if (!chan)
+		return;
+	count &= DMA_COUNT_MASK;
 	outl_sync(count, chan->io + DMA_BUFFER0_COUNT);
 }
 
@@ -316,9 +316,9 @@
 				      unsigned int count)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    count &= DMA_COUNT_MASK;
+	if (!chan)
+		return;
+	count &= DMA_COUNT_MASK;
 	outl_sync(count, chan->io + DMA_BUFFER1_COUNT);
 }
 
@@ -329,9 +329,9 @@
 				     unsigned int count)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return;
-    count &= DMA_COUNT_MASK;
+	if (!chan)
+		return;
+	count &= DMA_COUNT_MASK;
 	outl_sync(count, chan->io + DMA_BUFFER0_COUNT);
 	outl_sync(count, chan->io + DMA_BUFFER1_COUNT);
 }
@@ -342,30 +342,30 @@
  */
 static __inline__ int get_dma_buffer_done(unsigned int dmanr)
 {
-    unsigned int mode;
+	unsigned int mode;
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return 0;
+	if (!chan)
+		return 0;
 
 	mode = inl(chan->io + DMA_MODE_SET);
-    if (!(mode & (DMA_D0 | DMA_D1)) ||
-	(mode & (DMA_D0 | DMA_D1)) == (DMA_D0 | DMA_D1))
-	return -1;
+	if (!(mode & (DMA_D0 | DMA_D1)) ||
+	    (mode & (DMA_D0 | DMA_D1)) == (DMA_D0 | DMA_D1))
+		return -1;
 
-    return (mode & DMA_D0) ? 0 : 1;
+	return (mode & DMA_D0) ? 0 : 1;
 }
-	
-	
+
+
 /*
  * Returns the DMA channel's Buffer Done IRQ number.
  */
 static __inline__ int get_dma_done_irq(unsigned int dmanr)
 {
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return -1;
+	if (!chan)
+		return -1;
 
-    return chan->irq;
+	return chan->irq;
 }
 
 /*
@@ -373,22 +373,22 @@
  */
 static __inline__ int get_dma_residue(unsigned int dmanr)
 {
-    int curBufCntReg, count;
+	int curBufCntReg, count;
 	struct dma_chan *chan = get_dma_chan(dmanr);
-    if (!chan)
-	return 0;
+	if (!chan)
+		return 0;
 
-    curBufCntReg = (inl(chan->io + DMA_MODE_SET) & DMA_AB) ?
-        DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT;
+	curBufCntReg = (inl(chan->io + DMA_MODE_SET) & DMA_AB) ?
+	    DMA_BUFFER1_COUNT : DMA_BUFFER0_COUNT;
 
-    count = inl(chan->io + curBufCntReg) & DMA_COUNT_MASK;
-    
-    if ((chan->mode & DMA_DW_MASK) == DMA_DW16)
-	count <<= 1;
-    else if ((chan->mode & DMA_DW_MASK) == DMA_DW32)
-	count <<= 2;
+	count = inl(chan->io + curBufCntReg) & DMA_COUNT_MASK;
 
-    return count;
+	if ((chan->mode & DMA_DW_MASK) == DMA_DW16)
+		count <<= 1;
+	else if ((chan->mode & DMA_DW_MASK) == DMA_DW32)
+		count <<= 2;
+
+	return count;
 }
 
 #endif /* __ASM_AU1000_DMA_H */