From: James S. <jsi...@us...> - 2001-10-09 21:54:54
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Update of /cvsroot/linux-mips/linux/arch/mips/mm In directory usw-pr-cvs1:/tmp/cvs-serv17388/arch/mips/mm Modified Files: mips32.c r2300.c r4xx0.c r5432.c Log Message: Consolidate TLB context switching code. This also fixes a bunch very obscure bugs in the 32-bit code which probably didn't bite anybody yet. Index: mips32.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/mips32.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- mips32.c 2001/10/08 16:29:33 1.4 +++ mips32.c 2001/10/09 21:54:13 1.5 @@ -416,7 +416,7 @@ #undef DEBUG_TLB #undef DEBUG_TLBUPDATE -void flush_tlb_all(void) +void local_flush_tlb_all(void) { unsigned long flags; unsigned long old_ctx; @@ -451,7 +451,7 @@ __restore_flags(flags); } -void flush_tlb_mm(struct mm_struct *mm) +void local_flush_tlb_mm(struct mm_struct *mm) { if (mm->context != 0) { unsigned long flags; @@ -460,14 +460,14 @@ printk("[tlbmm<%d>]", mm->context); #endif __save_and_cli(flags); - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); __restore_flags(flags); } } -void flush_tlb_range(struct mm_struct *mm, unsigned long start, +void local_flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if(mm->context != 0) { @@ -509,7 +509,7 @@ } set_entryhi(oldpid); } else { - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); } @@ -517,7 +517,7 @@ } } -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if (vma->vm_mm->context != 0) { unsigned long flags; @@ -673,7 +673,7 @@ set_entryhi(old_ctx); BARRIER; set_pagemask (old_pagemask); - flush_tlb_all(); + local_flush_tlb_all(); __restore_flags(flags); } @@ -963,5 +963,5 @@ * be set for 4kb pages. */ write_32bit_cp0_register(CP0_PAGEMASK, PM_4K); - flush_tlb_all(); + local_flush_tlb_all(); } Index: r2300.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/r2300.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- r2300.c 2001/10/08 16:29:33 1.4 +++ r2300.c 2001/10/09 21:54:13 1.5 @@ -370,7 +370,7 @@ } /* TLB operations. */ -void flush_tlb_all(void) +void local_flush_tlb_all(void) { unsigned long flags; unsigned long old_ctx; @@ -392,7 +392,7 @@ restore_flags(flags); } -void flush_tlb_mm(struct mm_struct *mm) +void local_flush_tlb_mm(struct mm_struct *mm) { if (mm->context != 0) { unsigned long flags; @@ -401,14 +401,14 @@ printk("[tlbmm<%lu>]", (unsigned long) mm->context); #endif save_and_cli(flags); - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xfc0); restore_flags(flags); } } -void flush_tlb_range(struct mm_struct *mm, unsigned long start, +void local_flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if (mm->context != 0) { @@ -443,7 +443,7 @@ } set_entryhi(oldpid); } else { - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xfc0); } @@ -451,7 +451,7 @@ } } -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if(vma->vm_mm->context != 0) { unsigned long flags; @@ -610,7 +610,7 @@ wired++; tlb_write_indexed(); set_entryhi(old_ctx); - flush_tlb_all(); + local_flush_tlb_all(); restore_flags(flags); } } @@ -723,5 +723,5 @@ printk("Primary data cache %dkb, linesize %d bytes\n", (int) (dcache_size >> 10), (int) dcache_lsize); - flush_tlb_all(); + local_flush_tlb_all(); } Index: r4xx0.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/r4xx0.c,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- r4xx0.c 2001/10/08 16:29:33 1.7 +++ r4xx0.c 2001/10/09 21:54:13 1.8 @@ -1282,7 +1282,7 @@ #undef DEBUG_TLB #undef DEBUG_TLBUPDATE -void flush_tlb_all(void) +void local_flush_tlb_all(void) { unsigned long flags; unsigned long old_ctx; @@ -1315,7 +1315,7 @@ __restore_flags(flags); } -void flush_tlb_mm(struct mm_struct *mm) +void local_flush_tlb_mm(struct mm_struct *mm) { if (mm->context != 0) { unsigned long flags; @@ -1324,14 +1324,14 @@ printk("[tlbmm<%d>]", mm->context); #endif __save_and_cli(flags); - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); __restore_flags(flags); } } -void flush_tlb_range(struct mm_struct *mm, unsigned long start, +void local_flush_tlb_range(struct mm_struct *mm, unsigned long start, unsigned long end) { if(mm->context != 0) { @@ -1372,7 +1372,7 @@ } set_entryhi(oldpid); } else { - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); } @@ -1380,7 +1380,7 @@ } } -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if (vma->vm_mm->context != 0) { unsigned long flags; @@ -1566,7 +1566,7 @@ set_entryhi(old_ctx); BARRIER; set_pagemask (old_pagemask); - flush_tlb_all(); + local_flush_tlb_all(); __restore_flags(flags); } @@ -1880,5 +1880,5 @@ * be set for 4kb pages. */ set_pagemask(PM_4K); - flush_tlb_all(); + local_flush_tlb_all(); } Index: r5432.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/r5432.c,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- r5432.c 2001/10/08 16:29:33 1.3 +++ r5432.c 2001/10/09 21:54:13 1.4 @@ -448,7 +448,7 @@ #define NTLB_ENTRIES_HALF 24 /* Fixed on all R4XX0 variants... */ -void flush_tlb_all(void) +void local_flush_tlb_all(void) { unsigned long old_ctx; int entry; @@ -481,7 +481,7 @@ __restore_flags(flags); } -void flush_tlb_mm(struct mm_struct *mm) +void local_flush_tlb_mm(struct mm_struct *mm) { if (mm->context != 0) { unsigned long flags; @@ -490,15 +490,15 @@ printk("[tlbmm<%d>]", mm->context); #endif __save_and_cli(flags); - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); __restore_flags(flags); } } -void flush_tlb_range(struct mm_struct *mm, unsigned long start, - unsigned long end) +void local_flush_tlb_range(struct mm_struct *mm, unsigned long start, + unsigned long end) { if(mm->context != 0) { unsigned long flags; @@ -538,7 +538,7 @@ } set_entryhi(oldpid); } else { - get_new_mmu_context(mm, asid_cache); + get_new_cpu_mmu_context(mm, smp_processor_id()); if (mm == current->active_mm) set_entryhi(mm->context & 0xff); } @@ -546,7 +546,7 @@ } } -void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) { if (vma->vm_mm->context != 0) { unsigned long flags; @@ -702,7 +702,7 @@ set_entryhi(old_ctx); BARRIER; set_pagemask (old_pagemask); - flush_tlb_all(); + local_flush_tlb_all(); __restore_flags(flags); } @@ -764,5 +764,5 @@ * be set for 4kb pages. */ write_32bit_cp0_register(CP0_PAGEMASK, PM_4K); - flush_tlb_all(); + local_flush_tlb_all(); } |