From: James S. <jsi...@us...> - 2001-10-08 16:17:00
|
Update of /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27 In directory usw-pr-cvs1:/tmp/cvs-serv27765 Modified Files: ip27-irq.c Log Message: Move sendintr to IP27 code. This is SMP specific, so not yet the optimal place. Index: ip27-irq.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips64/sgi-ip27/ip27-irq.c,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- ip27-irq.c 2001/10/05 17:17:08 1.4 +++ ip27-irq.c 2001/10/08 16:16:58 1.5 @@ -33,10 +33,13 @@ #include <asm/pci/bridge.h> #include <asm/sn/sn0/hub.h> #include <asm/sn/sn0/ip27.h> +#include <asm/sn/addrs.h> +#include <asm/sn/agent.h> #include <asm/sn/arch.h> #include <asm/sn/intr.h> #include <asm/sn/intr_public.h> + #undef DEBUG_IRQ #ifdef DEBUG_IRQ #define DBG(x...) printk(x) @@ -513,6 +516,34 @@ { /* Nothing, the return from intr will work for us */ } + +#ifdef CONFIG_SMP + +void sendintr(int destid, unsigned char status) +{ + int irq; + +#if (CPUS_PER_NODE == 2) + switch (status) { + case DORESCHED: irq = CPU_RESCHED_A_IRQ; break; + case DOCALL: irq = CPU_CALL_A_IRQ; break; + default: panic("sendintr"); + } + irq += cputoslice(destid); + + /* + * Convert the compact hub number to the NASID to get the correct + * part of the address space. Then set the interrupt bit associated + * with the CPU we want to send the interrupt to. + */ + REMOTE_HUB_SEND_INTR(COMPACT_TO_NASID_NODEID(cputocnode(destid)), + FAST_IRQ_TO_LEVEL(irq)); +#else + << Bomb! Must redefine this for more than 2 CPUS. >> +#endif +} + +#endif extern void smp_call_function_interrupt(void); |