[Linux-mips-commits]CVS: linux/include/asm-mips div64.h,1.2,1.3

[James S. <jsi...@us...>]

Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv13217

Modified Files:
	div64.h 
Log Message:
Remove 64-bit variants of the code which are not safe on the 32-bit kernel.

Index: div64.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/div64.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- div64.h	2001/07/09 19:28:47	1.2
+++ div64.h	2001/10/04 15:53:28	1.3
@@ -1,6 +1,4 @@
 /*
- * include/asm-mips/div64.h
- * 
  * Copyright (C) 2000  Maciej W. Rozycki
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -16,9 +14,6 @@
  * No traps on overflows for any of these...
  */
 
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 ) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
-    (_MIPS_ISA == _MIPS_ISA_MIPS32)
-
 #define do_div64_32(res, high, low, base) ({ \
 	unsigned long __quot, __mod; \
 	unsigned long __cf, __tmp, __i; \
@@ -75,40 +70,5 @@
 	__quot = __quot << 32 | __low; \
 	(n) = __quot; \
 	__mod; })
-
-#else
-
-#define do_div64_32(res, high, low, base) ({ \
-	unsigned long __quot, __mod, __r0; \
-	\
-	__asm__("dsll32	%2,%z3,0\n\t" \
-		"or	%2,%2,%z4\n\t" \
-		"ddivu	$0,%2,%z5" \
-		: "=h" (__mod), "=l" (__quot), "=&r" (__r0) \
-		: "Jr" (high), "Jr" (low), "Jr" (base)); \
-	\
-	(res) = __quot; \
-	__mod; })
-
-#define do_div(n, base) ({ \
-	unsigned long long __quot; \
-	unsigned long __mod, __r0; \
-	\
-	__quot = (n); \
-	\
-	__asm__("dsll32	%2,%M3,0\n\t" \
-		"or	%2,%2,%L3\n\t" \
-		"ddivu	$0,%2,%z4\n\t" \
-		"mflo	%L1\n\t" \
-		"dsra32	%M1,%L1,0\n\t" \
-		"dsll32	%L1,%L1,0\n\t" \
-		"dsra32	%L1,%L1,0" \
-		: "=h" (__mod), "=r" (__quot), "=&r" (__r0) \
-		: "r" (n), "Jr" (base)); \
-	\
-	(n) = __quot; \
-	__mod; })
-
-#endif
 
 #endif /* _ASM_DIV64_H */