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[Linux-mips-commits]CVS: linux/arch/mips/vr4122/common Makefile,NONE,1.1 cmu.c,NONE,1.1 dbg_io.c,NONE,1.1 icu.c,NONE,1.1 kbd.c,NONE,1.1 pci.c,NONE,1.1 reset.c,NONE,1.1 time.c,NONE,1.1
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From: Jun S. <ju...@us...> - 2001-09-22 04:27:18
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Update of /cvsroot/linux-mips/linux/arch/mips/vr4122/common
In directory usw-pr-cvs1:/tmp/cvs-serv27047/arch/mips/vr4122/common
Added Files:
Makefile cmu.c dbg_io.c icu.c kbd.c pci.c reset.c time.c
Log Message:
Initial re-structuring of vr41xx directory. More are coming to
actually get Osprey/Eagle building and running.
--- NEW FILE: Makefile ---
#
# Copyright 2001 MontaVista Software Inc.
# Author: Yoichi Yuasa
# yy...@mv... or so...@mv...
#
# Makefile for the NEC Vr4122 CPU, generic files.
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
.S.s:
$(CPP) $(CFLAGS) $< -o $*.s
.S.o:
$(CC) $(CFLAGS) -c $< -o $*.o
all: vr4122.o
O_TARGET := vr4122.o
export-objs := serial.o
obj-y := cmu.o icu.o int-handler.o kbd.o reset.o time.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o
int-handler.o: int-handler.S
include $(TOPDIR)/Rules.make
--- NEW FILE: cmu.c ---
/*
* BRIEF MODULE DESCRIPTION
* NEC Vr4122 Clock Mask Unit routines.
*
* Copyright 2001 MontaVista Software Inc.
* Author: Yoichi Yuasa
* yy...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/vr4122/vr4122.h>
spinlock_t vr4122_cmu_lock = SPIN_LOCK_UNLOCKED;
void vr4122_clock_supply(unsigned short mask)
{
unsigned long flags;
unsigned short val;
write_lock_irqsave(&vr4122_cmu_lock, flags);
val = readw(VR4122_CMUCLKMSK);
val |= mask;
writew(val, VR4122_CMUCLKMSK);
write_unlock_irqrestore(&vr4122_cmu_lock, flags);
}
void vr4122_clock_mask(unsigned short mask)
{
unsigned long flags;
unsigned short val;
write_lock_irqsave(&vr4122_cmu_lock, flags);
val = readw(VR4122_CMUCLKMSK);
val &= ~mask;
writew(val, VR4122_CMUCLKMSK);
write_unlock_irqrestore(&vr4122_cmu_lock, flags);
}
--- NEW FILE: dbg_io.c ---
#include <linux/config.h>
#ifdef CONFIG_REMOTE_DEBUG
/* --- CONFIG --- */
/* we need uint32 uint8 */
typedef unsigned char uint8;
typedef unsigned short uint16;
typedef unsigned int uint32;
/* --- END OF CONFIG --- */
#define UART16550_BAUD_2400 2400
#define UART16550_BAUD_4800 4800
#define UART16550_BAUD_9600 9600
#define UART16550_BAUD_19200 19200
#define UART16550_BAUD_38400 38400
#define UART16550_BAUD_57600 57600
#define UART16550_BAUD_115200 115200
#define UART16550_PARITY_NONE 0
#define UART16550_PARITY_ODD 0x08
#define UART16550_PARITY_EVEN 0x18
#define UART16550_PARITY_MARK 0x28
#define UART16550_PARITY_SPACE 0x38
#define UART16550_DATA_5BIT 0x0
#define UART16550_DATA_6BIT 0x1
#define UART16550_DATA_7BIT 0x2
#define UART16550_DATA_8BIT 0x3
#define UART16550_STOP_1BIT 0x0
#define UART16550_STOP_2BIT 0x4
/* ----------------------------------------------------- */
/* === CONFIG === */
/* [stevel] we use the IT8712 serial port for kgdb */
#define DEBUG_BASE 0xAF000820 /* Vr4122 DSIU base address */
#define MAX_BAUD 115200
/* === END OF CONFIG === */
/* register offset */
#define OFS_RCV_BUFFER 0
#define OFS_TRANS_HOLD 0
#define OFS_SEND_BUFFER 0
#define OFS_INTR_ENABLE 1
#define OFS_INTR_ID 2
#define OFS_DATA_FORMAT 3
#define OFS_LINE_CONTROL 3
#define OFS_MODEM_CONTROL 4
#define OFS_RS232_OUTPUT 4
#define OFS_LINE_STATUS 5
#define OFS_MODEM_STATUS 6
#define OFS_RS232_INPUT 6
#define OFS_SCRATCH_PAD 7
#define OFS_DIVISOR_LSB 0
#define OFS_DIVISOR_MSB 1
/* memory-mapped read/write of the port */
#define UART16550_READ(y) (*((volatile uint8*)(DEBUG_BASE + y)))
#define UART16550_WRITE(y,z) ((*((volatile uint8*)(DEBUG_BASE + y))) = z)
void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
{
uint16 mask;
/* disable interrupts */
UART16550_WRITE(OFS_INTR_ENABLE, 0);
/* turn on the clocks to the serial port */
mask = *((volatile uint16 *)(0xAF000808));
mask &= ~0x0001;
*((volatile uint16 *)(0xAF000808)) = mask;
mask = *((volatile uint16 *)(0xAF000060));
mask |= 0x0802;
*((volatile uint16 *)(0xAF000060)) = mask;
/* set up buad rate */
{
uint32 divisor;
/* set DIAB bit */
UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
/* set divisor */
divisor = MAX_BAUD / baud;
UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00)>>8);
/* clear DIAB bit */
UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
}
/* set data format */
UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
}
static int remoteDebugInitialized = 0;
uint8 getDebugChar(void)
{
if (!remoteDebugInitialized) {
remoteDebugInitialized = 1;
debugInit(UART16550_BAUD_115200,
UART16550_DATA_8BIT,
UART16550_PARITY_NONE,
UART16550_STOP_1BIT);
}
while((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
return UART16550_READ(OFS_RCV_BUFFER);
}
int putDebugChar(uint8 byte)
{
if (!remoteDebugInitialized) {
remoteDebugInitialized = 1;
debugInit(UART16550_BAUD_115200,
UART16550_DATA_8BIT,
UART16550_PARITY_NONE,
UART16550_STOP_1BIT);
}
while ((UART16550_READ(OFS_LINE_STATUS) &0x20) == 0);
UART16550_WRITE(OFS_SEND_BUFFER, byte);
return 1;
}
#endif
--- NEW FILE: icu.c ---
/*
* BRIEF MODULE DESCRIPTION
* Interrupt dispatcher for NEC Vr4122 Interrupt Control Unit.
*
* Copyright 2001 MontaVista Software Inc.
* Author: Yoichi Yuasa
* yy...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <asm/io.h>
#include <asm/types.h>
#include <asm/vr4122/vr4122.h>
static void giuint_irqdispatch(struct pt_regs *regs)
{
u16 pendl, pendh, maskl, maskh;
int i = 0;
pendl = readw(VR4122_GIUINTLREG);
pendh = readw(VR4122_GIUINTHREG);
maskl = readw(VR4122_MGIUINTLREG);
maskh = readw(VR4122_MGIUINTHREG);
pendl &= maskl;
pendh &= maskh;
if (pendl) {
for (i = 0; i < 16; i++) {
if (pendl & 0x0001) {
do_IRQ(VR4122_GIUINTL_IRQ_BASE + i, regs);
return;
}
pendl >>= 1;
}
}
else if (pendh) {
for (i = 0; i < 16; i++) {
if (pendh & 0x0001) {
do_IRQ(VR4122_GIUINTH_IRQ_BASE + i, regs);
return;
}
pendh >>= 1;
}
}
}
asmlinkage void int0_icu_irqdispatch(struct pt_regs *regs)
{
u16 pend1, pend2, mask1, mask2;
int i;
pend1 = readw(VR4122_SYSINT1REG);
pend2 = readw(VR4122_SYSINT2REG);
mask1 = readw(VR4122_MSYSINT1REG);
mask2 = readw(VR4122_MSYSINT2REG);
pend1 &= mask1;
pend2 &= mask2;
if (pend1) {
if ((pend1 & 0x01ff) == 0x0100) {
giuint_irqdispatch(regs);
return;
}
else {
for (i = 0; i < 16; i++) {
if (pend1 & 0x0001) {
do_IRQ(VR4122_SYSINT1_IRQ_BASE + i, regs);
return;
}
pend1 >>= 1;
}
}
}
else if (pend2) {
for (i = 0; i < 16; i++) {
if (pend2 & 0x0001) {
do_IRQ(VR4122_SYSINT2_IRQ_BASE + i, regs);
return;
}
pend2 >>= 1;
}
}
}
--- NEW FILE: kbd.c ---
/*
* linux/arch/mips/vr4122/common/kbd.c
*
* Allows CONFIG_VT without keyboard (KIU) driver
*
* Copyright (C) 1999 Bradley D. LaRonde
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/init.h>
void kbd_leds(unsigned char leds)
{
return;
}
int kbd_setkeycode(unsigned int scancode, unsigned int keycode)
{
return (scancode == keycode) ? 0 : -EINVAL;
}
int kbd_getkeycode(unsigned int scancode)
{
return scancode;
}
int kbd_translate(unsigned char scancode, unsigned char *keycode,
char raw_mode)
{
*keycode = scancode;
return 1;
}
char kbd_unexpected_up(unsigned char keycode)
{
return 0x80;
}
void __init kbd_init_hw(void)
{
}
--- NEW FILE: pci.c ---
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* PCI support for NEC Vr4122.
*
* Copyright (C) 2000 Mike McDonald
*/
#include <linux/config.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/vr4122/vr4122.h>
#ifdef CONFIG_PCI
#define mkaddr(dev, reg) \
do { \
if (dev->bus->number == 0) { \
if (PCI_SLOT(dev->devfn) < 11 || \
PCI_SLOT(dev->devfn) >= 32 || \
PCI_FUNC(dev->devfn) >= 8 || \
reg >= 256) \
return 0xFFFFFFFF; \
*(volatile u32 *)VR4122_PCICONFAREG = \
(reg & 0xFC) | \
( PCI_FUNC(dev->devfn) << 8) | \
(1 << PCI_SLOT(dev->devfn)); \
} else { \
if (dev->bus->number >= 256 || \
PCI_SLOT(dev->devfn) >= 32 || \
PCI_FUNC(dev->devfn) >=8 || \
reg >= 256) \
return 0xFFFFFFFF; \
*(volatile u32 *)VR4122_PCICONFAREG = 1 | \
(reg & 0xFC) | \
(dev->devfn << 8) | \
(dev->bus->number << 16); \
} \
} while (0);
/*
* We can't address 8 and 16 bit words directly. Instead we have to
* read/write a 32bit word and mask/modify the data we actually want.
*/
int vr4122_pcibios_read_config_byte(struct pci_dev *dev,
int where, unsigned char *val)
{
u32 res;
mkaddr(dev, where);
res = readl(VR4122_PCICONFDREG);
*val = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xff;
return PCIBIOS_SUCCESSFUL;
}
int vr4122_pcibios_read_config_word(struct pci_dev *dev,
int where, unsigned short *val)
{
u32 res;
if (where & 1)
return PCIBIOS_BAD_REGISTER_NUMBER;
mkaddr(dev, where);
res = readl(VR4122_PCICONFDREG);
*val = (le32_to_cpu(res) >> ((where & 3) << 3)) & 0xffff;
return PCIBIOS_SUCCESSFUL;
}
int vr4122_pcibios_read_config_dword(struct pci_dev *dev,
int where, unsigned int *val)
{
u32 res;
if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
mkaddr(dev, where);
res = readl(VR4122_PCICONFDREG);
*val = le32_to_cpu(res);
return PCIBIOS_SUCCESSFUL;
}
int vr4122_pcibios_write_config_byte(struct pci_dev *dev,
int where, unsigned char val)
{
mkaddr(dev, where);
writeb(val, VR4122_PCICONFDREG + (where & 3));
return PCIBIOS_SUCCESSFUL;
}
int vr4122_pcibios_write_config_word(struct pci_dev *dev,
int where, unsigned short val)
{
if (where & 1)
return PCIBIOS_BAD_REGISTER_NUMBER;
mkaddr(dev, where);
writew(le16_to_cpu(val), VR4122_PCICONFDREG + (where & 3));
return PCIBIOS_SUCCESSFUL;
}
int vr4122_pcibios_write_config_dword(struct pci_dev *dev,
int where, unsigned int val)
{
if (where & 3)
return PCIBIOS_BAD_REGISTER_NUMBER;
mkaddr(dev, where);
writel(le32_to_cpu(val), VR4122_PCICONFDREG);
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops vr4122_pci_ops = {
vr4122_pcibios_read_config_byte,
vr4122_pcibios_read_config_word,
vr4122_pcibios_read_config_dword,
vr4122_pcibios_write_config_byte,
vr4122_pcibios_write_config_word,
vr4122_pcibios_write_config_dword
};
void __init vr4122_pcibios_init(void)
{
u32 dummy;
/* Enable PCI clock */
vr4122_clock_supply(VR4122_CMUCLKMSK_MSKPCIU);
udelay(100);
/* Set master memory & I/O windows */
*(volatile u32 *)VR4122_PCIMMAW1REG = 0x100f9010;
*(volatile u32 *)VR4122_PCIMMAW2REG = 0x140fd014;
*(volatile u32 *)VR4122_PCIMIOAWREG = 0x160fd000;
/* Set target memory windows */
*(volatile u32 *)VR4122_PCITAW1REG = 0x00081000;
*(volatile u32 *)VR4122_PCIMBA1REG = 0x00000000;
*(volatile u32 *)VR4122_PCITAW2REG = 0x00000000;
*(volatile u32 *)VR4122_PCIMAILBAREG = 0x00000000;
/* Clear bus error */
dummy = *(volatile u32 *)VR4122_BUSERRADREG;
*(volatile u32 *)VR4122_PCICLKSELREG = 0x00000000; /* PCIckl = VRCKL/2 */
*(volatile u32 *)VR4122_PCITRDYVREG = 100;
*(volatile u32 *)VR4122_PCICACHELSREG = 0x00008004;
udelay(100);
*(volatile u32 *)VR4122_PCIENREG = 0x00000004;
*(volatile u32 *)VR4122_PCICOMMANDREG = 0x00000147;
mdelay(3);
}
#endif /* CONFIG_PCI */
--- NEW FILE: reset.c ---
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* Copyright (C) 1997, 2001 Ralf Baechle
* Copyright 2001 MontaVista Software Inc.
* Author: js...@mv... or js...@ju...
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/processor.h>
#include <asm/reboot.h>
#include <asm/system.h>
void vr4122_restart(char *command)
{
set_cp0_status((ST0_BEV | ST0_ERL), (ST0_BEV | ST0_ERL));
set_cp0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_32bit_cp0_register(CP0_WIRED, 0);
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
void vr4122_halt(void)
{
printk(KERN_NOTICE "\n** You can safely turn off the power\n");
while (1);
}
void vr4122_power_off(void)
{
vr4122_halt();
}
--- NEW FILE: time.c ---
/*
* BRIEF MODULE DESCRIPTION
* NEC Vr4122 RTC Unit routines.
*
* Copyright 2001 MontaVista Software Inc.
* Author: Yoichi Yuasa
* yy...@mv... or so...@mv...
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/spinlock.h>
#include <asm/io.h>
#include <asm/time.h>
#include <asm/vr4122/vr4122.h>
spinlock_t vr4122_rtc_lock = SPIN_LOCK_UNLOCKED;
static inline unsigned short read_etime_register(unsigned long addr)
{
unsigned short val;
do {
val = readw(addr);
} while (val != readw(addr));
return val;
}
static unsigned long vr4122_rtc_get_time(void)
{
unsigned short etimel, etimem, etimeh;
do {
etimem = read_etime_register(VR4122_ETIMEMREG);
etimeh = read_etime_register(VR4122_ETIMEHREG);
etimel = read_etime_register(VR4122_ETIMELREG);
} while (etimem != read_etime_register(VR4122_ETIMEMREG));
return ((etimeh << 17) | (etimem << 1) | (etimel >> 15));
}
static int vr4122_rtc_set_time(unsigned long sec)
{
unsigned long flags;
spin_lock_irqsave(&vr4122_rtc_lock, flags);
writew(sec << 15, VR4122_ETIMELREG);
writew(sec >> 1, VR4122_ETIMEMREG);
writew(sec >> 17, VR4122_ETIMEHREG);
spin_unlock_irqrestore(&vr4122_rtc_lock, flags);
return 0;
}
void vr4122_time_init(void)
{
rtc_get_time = vr4122_rtc_get_time;
rtc_set_time = vr4122_rtc_set_time;
}
void vr4122_timer_setup(struct irqaction *irq)
{
unsigned int count;
count = read_32bit_cp0_register(CP0_COUNT);
write_32bit_cp0_register (CP0_COMPARE, count + (mips_counter_frequency / HZ));
setup_irq(VR4122_IRQ_TIMER, irq);
}
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