From: James S. <jsi...@us...> - 2001-08-23 23:39:54
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Update of /cvsroot/linux-mips/linux/arch/mips/kernel In directory usw-pr-cvs1:/tmp/cvs-serv29445 Modified Files: pci.c Log Message: Removed MIPS_ASSERT. It only exist for the ddb5xxx platform. Index: pci.c =================================================================== RCS file: /cvsroot/linux-mips/linux/arch/mips/kernel/pci.c,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** pci.c 2001/07/07 19:37:24 1.1 --- pci.c 2001/08/23 23:39:51 1.2 *************** *** 1,3 **** ! /*********************************************************************** * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, js...@mv... or js...@ju... --- 1,3 ---- ! /* * Copyright 2001 MontaVista Software Inc. * Author: Jun Sun, js...@mv... or js...@ju... *************** *** 11,15 **** * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. - *********************************************************************** */ --- 11,14 ---- *************** *** 27,31 **** * later use by Linux. * ! * . We finally reply on a board supplied function, pcibios_fixup_irq(), to * to assign the interrupts. We may use setup-irq.c under drivers/pci * later. --- 26,30 ---- * later use by Linux. * ! * . We finally reply on a board supplied function, pcibios_fixup_irq(), to * to assign the interrupts. We may use setup-irq.c under drivers/pci * later. *************** *** 37,43 **** * Limitations: * ! * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus ! * into a contiguous range. ! * * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical * address space. --- 36,42 ---- * Limitations: * ! * . We "collapse" all IO and MEM spaces in sub-buses under a top-level bus ! * into a contiguous range. ! * * . In the case of Memory space, the rnage is 1:1 mapping with CPU physical * address space. *************** *** 57,61 **** * David Mosberger da...@cs... */ - #include <linux/kernel.h> #include <linux/init.h> --- 56,59 ---- *************** *** 73,78 **** }; - extern int pciauto_assign_resources(int busno, struct pci_channel * hose); void __init pcibios_init(void) { --- 71,76 ---- }; extern int pciauto_assign_resources(int busno, struct pci_channel * hose); + void __init pcibios_init(void) { *************** *** 108,160 **** } ! unsigned long __init ! pci_bridge_check_io(struct pci_dev *bridge) { ! u16 io; ! pci_read_config_word(bridge, PCI_IO_BASE, &io); ! if (!io) { ! pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); ! pci_read_config_word(bridge, PCI_IO_BASE, &io); ! pci_write_config_word(bridge, PCI_IO_BASE, 0x0); ! } ! if (io) ! return IORESOURCE_IO; ! printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n", ! bridge->name); ! return 0; } void __init pcibios_fixup_bus(struct pci_bus *bus) { ! /* Propogate hose info into the subordinate devices. */ ! struct pci_channel *hose = bus->sysdata; ! struct pci_dev *dev = bus->self; ! if (!dev) { ! /* Root bus */ ! bus->resource[0] = hose->io_resource; ! bus->resource[1] = hose->mem_resource; ! } else { ! /* This is a bridge. Do not care how it's initialized, ! just link its resources to the bus ones */ ! int i; ! for(i=0; i<3; i++) { ! bus->resource[i] = ! &dev->resource[PCI_BRIDGE_RESOURCES+i]; ! bus->resource[i]->name = bus->name; ! } ! bus->resource[0]->flags |= pci_bridge_check_io(dev); ! bus->resource[1]->flags |= IORESOURCE_MEM; ! /* For now, propogate hose limits to the bus; ! we'll adjust them later. */ ! bus->resource[0]->end = hose->io_resource->end; ! bus->resource[1]->end = hose->mem_resource->end; ! /* Turn off downstream PF memory address range by default */ ! bus->resource[2]->start = 1024*1024; ! bus->resource[2]->end = bus->resource[2]->start - 1; ! } } --- 106,157 ---- } ! unsigned long __init pci_bridge_check_io(struct pci_dev *bridge) { ! u16 io; ! pci_read_config_word(bridge, PCI_IO_BASE, &io); ! if (!io) { ! pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); ! pci_read_config_word(bridge, PCI_IO_BASE, &io); ! pci_write_config_word(bridge, PCI_IO_BASE, 0x0); ! } ! if (io) ! return IORESOURCE_IO; ! printk(KERN_WARNING "PCI: bridge %s does not support I/O forwarding!\n", ! bridge->name); ! return 0; } void __init pcibios_fixup_bus(struct pci_bus *bus) { ! /* Propogate hose info into the subordinate devices. */ ! struct pci_channel *hose = bus->sysdata; ! struct pci_dev *dev = bus->self; ! if (!dev) { ! /* Root bus */ ! bus->resource[0] = hose->io_resource; ! bus->resource[1] = hose->mem_resource; ! } else { ! /* This is a bridge. Do not care how it's initialized, ! just link its resources to the bus ones */ ! int i; ! for(i=0; i<3; i++) { ! bus->resource[i] = ! &dev->resource[PCI_BRIDGE_RESOURCES+i]; ! bus->resource[i]->name = bus->name; ! } ! bus->resource[0]->flags |= pci_bridge_check_io(dev); ! bus->resource[1]->flags |= IORESOURCE_MEM; ! /* For now, propogate hose limits to the bus; ! we'll adjust them later. */ ! bus->resource[0]->end = hose->io_resource->end; ! bus->resource[1]->end = hose->mem_resource->end; ! /* Turn off downstream PF memory address range by default */ ! bus->resource[2]->start = 1024*1024; ! bus->resource[2]->end = bus->resource[2]->start - 1; ! } } *************** *** 168,179 **** { /* this should not be called */ - MIPS_ASSERT(1 == 0); } void pcibios_update_resource(struct pci_dev *dev, struct resource *root, ! struct resource *res, int resource) { /* this should not be called */ - MIPS_ASSERT(1 == 0); } --- 165,174 ---- { /* this should not be called */ } void pcibios_update_resource(struct pci_dev *dev, struct resource *root, ! struct resource *res, int resource) { /* this should not be called */ } |