From: Pete P. <pp...@pa...> - 2001-07-06 01:37:14
|
Paul Mundt wrote: > On Thu, Jul 05, 2001 at 05:57:17PM -0700, Pete Popov wrote: > >> One of the things I would like to add to the mips tree is generic pci >>code. Jun recently ported the PPC pci_auto.c and pci.c code to one of >>the DDB NEC boards. Now I've taken that code and made it mips generic. >> I've tested it on one mips board so far; I will soon have it tested on >>a couple of more boards.The code has two components: pci_auto.c and >>pci.c. The pci_auto (if enabled) scans the bus(es) and assigns all the >>resources. Thus, you don't need boot code to do that anymore. This code >>has been tested pretty well on PPC on some pretty complex CPCI systems >>with multiple P2P bridges and devices behind the bridges. pci.c is the >>second part and that's just generic pci handling code that all boards >>should be able to use. >> >>We've modified the code somewhat from the PPC and it certainly needs a >>lot of testing. However, it's only enabled in arch/mips/config.in for >>boards that are tested so other boards can take their time moving over >>to this code. I think this code is badly needed in the mips tree >>because right now every board is doing its own pci thing. Add to that >>different boot codes on different boards which don't necessarily >>initialize the bus correctly, and you've got a real mess. >> >> > Very nice! Speaking of supported boards.. have you had a chance to test it > out on the ITE IT8172? If not, I'll give it a try tomorrow and let you know > my results. Not yet. I tested it on the ev96100 and basically the same code is running on the ddb5477 board. I've got an ITE board sitting here in my home right now. I suspect some setup changes might have to be made to the ite code, but the pci code *should* just work. Matt has done a great job there, and it's been tested on pretty complex PPC CPCI systems (like I said though, we modified it slightly for mips, so I'm sure we'll evolve this over time). The ITE can be a bit tricky because it's got discountinuous pci memory space regions. Two of those regions are 64MB each; the others are smaller. Globespan, for example, is using both 64MB regions for their custom mpeg chip, so no other devices can be assigned from those regions. But I don't think I'll worry about that on the ITE board. Next I need to include this pci support in the Alchemy board. The problem is that right now I'm supposed to turn my attention to generic mips kernel problems ... BTW, what's up with the 2.4.5 bootp support? The code doesn't appear to get called unless you specify "ip=<ipaddress>" on the kernel command line. Pete |