Update of /cvsroot/linux-mips/linux/include/asm-mips
In directory usw-pr-cvs1:/tmp/cvs-serv32248/include/asm-mips
Modified Files:
bootinfo.h cpu.h vr41xx.h
Log Message:
Merge yoichi-san's vr41xx patch. Still some cleanups needed..
Index: bootinfo.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/bootinfo.h,v
retrieving revision 1.31
retrieving revision 1.32
diff -u -d -r1.31 -r1.32
--- bootinfo.h 18 Jun 2002 23:07:27 -0000 1.31
+++ bootinfo.h 12 Jul 2002 20:14:28 -0000 1.32
@@ -171,7 +171,7 @@
* Valid machtype for group NEC_VR41XX
*/
#define MACH_NEC_OSPREY 0 /* Osprey eval board */
-#define MACH_NEC_EAGLE 1 /* NEC Eagle board */
+#define MACH_NEC_EAGLE 1 /* NEC Eagle/Hawk board */
#define MACH_NEC_KORVA 2 /* NEC korva board */
#define MACH_VADEM_CLIO_1000 3 /* Vadem Clio 1000 */
#define MACH_NEC_MOBILEPRO_780 4 /* NEC MobilePro 780 PDA */
@@ -180,6 +180,8 @@
#define MACH_CASIO_E55 7 /* Casio Cassiopeia E-55/65 */
#define MACH_IBM_WORKPAD 8 /* IBM WorkPad z50 */
#define MACH_VICTOR_MPC303 9 /* Victor MP-C303/304 */
+#define MACH_ZAO_CAPCELLA 10 /* ZAO Networks Capcella */
+#define MACH_LASER5_LROUTER 11 /* Laser5 L-Router */
#define CL_SIZE (256)
Index: cpu.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/cpu.h,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- cpu.h 13 Jun 2002 18:26:04 -0000 1.29
+++ cpu.h 12 Jul 2002 20:14:28 -0000 1.30
@@ -107,6 +107,20 @@
#define PRID_REV_TX3927 0x0040
#define PRID_REV_TX3927B 0x0041
#define PRID_REV_TX4927 0x0022
+#define PRID_REV_VR4111 0x0052
+#define PRID_REV_VR4181 0x0052 /* Same as VR4111 */
+#define PRID_REV_VR4121 0x0060 /* VR4121 0x0060 - 0x006f */
+#define PRID_REV_VR4122_REV1_0 0x0070 /* VR4122 0x70-0x72 */
+#define PRID_REV_VR4122_REV2_0 0x0070
+#define PRID_REV_VR4122_REV2_1 0x0070
+#define PRID_REV_VR4122_REV3_0 0x0071
+#define PRID_REV_VR4122_REV3_1 0x0072
+#define PRID_REV_VR4181A_REV1_0 0x0073 /* VR4181A 0x0073 - 0x007f */
+#define PRID_REV_VR4181A_REV1_1 0x0074
+#define PRID_REV_VR4131_REV1_2 0x0080 /* VR4131 0x80-0x8f */
+#define PRID_REV_VR4131_REV2_0 0x0081
+#define PRID_REV_VR4131_REV2_1 0x0082
+#define PRID_REV_VR4131_REV2_2 0x0083
/*
* FPU implementation/revision register (CP1 control register 0).
@@ -148,7 +162,8 @@
CPU_5KC, CPU_R4310, CPU_SB1, CPU_TX3912, CPU_TX3922, CPU_TX3927,
CPU_AU1000, CPU_4KEC, CPU_4KSC, CPU_VR41XX, CPU_R5500, CPU_TX49XX,
CPU_TX39XX, CPU_AU1500, CPU_R5900, CPU_RC32300, CPU_SR7100,
- CPU_AU1100, CPU_20KC, CPU_LAST
+ CPU_AU1100, CPU_20KC, CPU_VR4111, CPU_VR4121, CPU_VR4122, CPU_VR4131,
+ CPU_VR4181, CPU_VR4181A, CPU_LAST
};
#endif
Index: vr41xx.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/vr41xx.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- vr41xx.h 14 Jun 2002 15:02:16 -0000 1.4
+++ vr41xx.h 12 Jul 2002 20:14:28 -0000 1.5
@@ -50,6 +50,7 @@
/*
* Clock Mask Unit
*/
+extern void vr41xx_cmu_init(u16 mask);
extern void vr41xx_clock_supply(u16 mask);
extern void vr41xx_clock_mask(u16 mask);
@@ -58,23 +59,49 @@
*/
/* GIU Interrupt Numbers */
-#define GIUL_IRQ(x) (40 + (x))
-#define GIUH_IRQ(x) (56 + (x))
+#define GIU_IRQ(x) (40 + (x))
-struct irqcascade {
- int cascade;
- int (*get_irq_number)(int irq);
+extern void (*board_irq_init)(void);
+extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
+
+/*
+ * Gegeral-Purpose I/O Unit
+ */
+enum {
+ TRIGGER_LEVEL,
+ TRIGGER_EDGE
};
-extern void (*board_irq_init)(void);
-extern void vr41xx_board_irq_init(void);
-extern void vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
+enum {
+ SIGNAL_THROUGH,
+ SIGNAL_HOLD
+};
+
+extern void vr41xx_set_irq_trigger(u8 pin, u8 trigger, u8 hold);
+
+enum {
+ LEVEL_LOW,
+ LEVEL_HIGH
+};
+
+extern void vr41xx_set_irq_level(u8 pin, u8 level);
+
+enum {
+ PIO_INPUT,
+ PIO_OUTPUT
+};
+
+enum {
+ DATA_LOW,
+ DATA_HIGH
+};
/*
* Serial Interface Unit
*/
-extern void vr41xx_siu_init(int line, int interface, int module);
+extern void vr41xx_siu_init(int interface, int module);
extern void vr41xx_siu_ifselect(int interface, int module);
+extern int vr41xx_serial_ports;
/* SIU interfaces */
enum {
@@ -92,12 +119,24 @@
/*
* Debug Serial Interface Unit
*/
-extern void vr41xx_dsiu_init(int line);
+extern void vr41xx_dsiu_init(void);
/*
* PCI Control Unit
*/
-extern void vr41xx_pciu_init(void);
+struct vr41xx_pci_address_space {
+ u32 internal_base;
+ u32 address_mask;
+ u32 pci_base;
+};
+
+struct vr41xx_pci_address_map {
+ struct vr41xx_pci_address_space *mem1;
+ struct vr41xx_pci_address_space *mem2;
+ struct vr41xx_pci_address_space *io;
+};
+
+extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map);
/*
* MISC
@@ -110,4 +149,3 @@
extern void vr41xx_power_off(void);
#endif /* __ASM_MIPS_VR41XX_H */
-
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