Update of /cvsroot/linux-mips/linux/arch/mips/au1000/pb1100
In directory usw-pr-cvs1:/tmp/cvs-serv32242/arch/mips/au1000/pb1100
Modified Files:
setup.c
Log Message:
Replaced readl/writel type of macros with au_readl/au_writel since
we need to enable software byte swapping in BE mode, but register
accesses should not be swapped. The Pb1x00 boards are now mostly BE
safe, but some external peripherals (external to the SOC) are not yet
usable in BE mode. USB has not been tested in BE mode either.
Index: setup.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/au1000/pb1100/setup.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- setup.c 18 Apr 2002 20:28:43 -0000 1.3
+++ setup.c 1 May 2002 18:00:30 -0000 1.4
@@ -129,8 +129,8 @@
#endif
// set AUX clock to 12MHz * 8 = 96 MHz
- writel(8, SYS_AUXPLL);
- writel(0, SYS_PININPUTEN);
+ au_writel(8, SYS_AUXPLL);
+ au_writel(0, SYS_PININPUTEN);
udelay(100);
#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
@@ -145,53 +145,53 @@
}
#endif
// configure pins GPIO[14:9] as GPIO
- pin_func = readl(SYS_PINFUNC) & (u32)(~0x80);
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
/* zero and disable FREQ2 */
- sys_freqctrl = readl(SYS_FREQCTRL0);
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- writel(sys_freqctrl, SYS_FREQCTRL0);
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
/* zero and disable USBH/USBD/IrDA clock */
- sys_clksrc = readl(SYS_CLKSRC);
+ sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x0000001F;
- writel(sys_clksrc, SYS_CLKSRC);
+ au_writel(sys_clksrc, SYS_CLKSRC);
- sys_freqctrl = readl(SYS_FREQCTRL0);
+ sys_freqctrl = au_readl(SYS_FREQCTRL0);
sys_freqctrl &= ~0xFFF00000;
- sys_clksrc = readl(SYS_CLKSRC);
+ sys_clksrc = au_readl(SYS_CLKSRC);
sys_clksrc &= ~0x0000001F;
// FREQ2 = aux/2 = 48 MHz
sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
- writel(sys_freqctrl, SYS_FREQCTRL0);
+ au_writel(sys_freqctrl, SYS_FREQCTRL0);
/*
* Route 48MHz FREQ2 into USBH/USBD/IrDA
*/
sys_clksrc |= ((4<<2) | (0<<1) | 0 );
- writel(sys_clksrc, SYS_CLKSRC);
+ au_writel(sys_clksrc, SYS_CLKSRC);
// get USB Functionality pin state (device vs host drive pins)
- pin_func = readl(SYS_PINFUNC) & (u32)(~0x8000);
+ pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
#ifndef CONFIG_AU1000_USB_DEVICE
// 2nd USB port is USB host
pin_func |= 0x8000;
#endif
- writel(pin_func, SYS_PINFUNC);
+ au_writel(pin_func, SYS_PINFUNC);
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
#ifdef CONFIG_USB_OHCI
// enable host controller and wait for reset done
- writel(0x08, USB_HOST_CONFIG);
+ au_writel(0x08, USB_HOST_CONFIG);
udelay(1000);
- writel(0x0c, USB_HOST_CONFIG);
+ au_writel(0x0c, USB_HOST_CONFIG);
udelay(1000);
- readl(USB_HOST_CONFIG);
- while (!(readl(USB_HOST_CONFIG) & 0x10))
+ au_readl(USB_HOST_CONFIG);
+ while (!(au_readl(USB_HOST_CONFIG) & 0x10))
;
- readl(USB_HOST_CONFIG);
+ au_readl(USB_HOST_CONFIG);
#endif
#ifdef CONFIG_FB
@@ -215,22 +215,22 @@
#ifndef CONFIG_SERIAL_NONSTANDARD
/* don't touch the default serial console */
- writel(0, UART0_ADDR + UART_CLK);
+ au_writel(0, UART0_ADDR + UART_CLK);
#endif
- outl(0, UART1_ADDR + UART_CLK);
- outl(0, UART3_ADDR + UART_CLK);
+ au_writel(0, UART1_ADDR + UART_CLK);
+ au_writel(0, UART3_ADDR + UART_CLK);
#ifdef CONFIG_BLK_DEV_IDE
ide_ops = &std_ide_ops;
#endif
- while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
- writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
+ au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
- while (readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
- writel(0, SYS_TOYTRIM);
+ while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
+ au_writel(0, SYS_TOYTRIM);
- writel(0x00000060, 0xb190003c);
+ au_writel(0x00000060, 0xb190003c);
#ifdef CONFIG_RTC
rtc_ops = &pb1500_rtc_ops;
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