Update of /cvsroot/linux-mips/linux/arch/mips/mm
In directory usw-pr-cvs1:/tmp/cvs-serv10804
Modified Files:
tlb-r4k.c
Log Message:
RC32300 support was trampled in the sync to OSS at rev 1.10.
Index: tlb-r4k.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/mm/tlb-r4k.c,v
retrieving revision 1.11
retrieving revision 1.12
diff -u -d -r1.11 -r1.12
--- tlb-r4k.c 9 Mar 2002 01:36:19 -0000 1.11
+++ tlb-r4k.c 25 Apr 2002 22:16:50 -0000 1.12
@@ -344,13 +344,21 @@
unsigned int prid, config1;
prid = read_32bit_cp0_register(CP0_PRID) & 0xff00;
- if (prid == PRID_IMP_RM7000 || !(config & (1 << 31)))
+ switch (prid) {
+ case PRID_IMP_RM7000:
+ case PRID_IMP_RC32334:
+ case PRID_IMP_RC32355:
/*
- * Not a MIPS32 complianant CPU. Config 1 register not
+ * Not a MIPS32 compliant CPU. Config 1 register not
* supported, we assume R4k style. Cpu probing already figured
* out the number of tlb entries.
*/
return;
+ default:
+ /* config1 register available? */
+ if (!(config & (1 << 31)))
+ return;
+ }
config1 = read_mips32_cp0_config1();
if (!((config >> 7) & 3))
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