Update of /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic
In directory usw-pr-cvs1:/tmp/cvs-serv16295/arch/mips/ite-boards/generic
Modified Files:
int-handler.S time.c
Log Message:
IT8172 board(s) update. The timer function call has changed ...
Index: int-handler.S
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/int-handler.S,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- int-handler.S 22 Nov 2001 01:19:24 -0000 1.3
+++ int-handler.S 24 Apr 2002 17:31:44 -0000 1.4
@@ -27,7 +27,7 @@
andi a0, t0, CAUSEF_IP7
beq a0, zero, 1f
move a0, sp
- jal local_timer_interrupt
+ jal ite_timer_interrupt
j ret_from_irq
nop
Index: time.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/arch/mips/ite-boards/generic/time.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- time.c 21 Apr 2002 19:30:07 -0000 1.9
+++ time.c 24 Apr 2002 17:31:44 -0000 1.10
@@ -129,9 +129,6 @@
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
void __init it8172_timer_setup(struct irqaction *irq)
{
- puts("timer_setup\n");
- put32(NR_IRQS);
- puts("");
/* we are using the cpu counter for timer interrupts */
setup_irq(MIPS_CPU_TIMER_IRQ, irq);
@@ -141,3 +138,8 @@
set_cp0_status(ALLINTS);
}
+void ite_timer_interrupt(struct pt_regs *regs)
+{
+ ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs);
+ //do_IRQ(MIPS_CPU_TIMER_IRQ, regs);
+}
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