Update of /cvsroot/linux-mips/linux/include/asm-mips/cobalt
In directory usw-pr-cvs1:/tmp/cvs-serv3535/include/asm-mips/cobalt
Modified Files:
cobalt.h
Log Message:
More OSS syncing..
Index: cobalt.h
===================================================================
RCS file: /cvsroot/linux-mips/linux/include/asm-mips/cobalt/cobalt.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- cobalt.h 1 Dec 2001 00:56:22 -0000 1.3
+++ cobalt.h 21 Apr 2002 20:01:15 -0000 1.4
@@ -7,18 +7,13 @@
*
* Copyright (C) 1997 Cobalt Microserver
* Copyright (C) 1997 Ralf Baechle
+ * Copyright (C) 2001 Liam Davies (ld...@ag...)
*
- * $Id$
*/
#ifndef __ASM_MIPS_COBALT_H
#define __ASM_MIPS_COBALT_H
/*
- * Base address of I/O ports
- */
-#define COBALT_LOCAL_IO_SPACE 0xa0000000
-
-/*
* COBALT interrupt enable bits
*/
#define COBALT_IE_PCI (1 << 0)
@@ -42,7 +37,9 @@
*/
#define COBALT_TIMER_IRQ 0
#define COBALT_KEYBOARD_IRQ 1
-#define COBALT_ETHERNET_IRQ 13
+#define COBALT_QUBE_ETH_IRQ 13
+#define COBALT_RAQ_ETH0_IRQ 4
+#define COBALT_RAQ_ETH1_IRQ 13
#define COBALT_SCC_IRQ 4
#define COBALT_SERIAL2_IRQ 4
#define COBALT_PARALLEL_IRQ 5
@@ -65,55 +62,23 @@
#define COBALT_PCICONF_PCISLOT 0x0A
#define COBALT_PCICONF_ETH1 0x0C
-#define PCI_DEVSHFT(x) ((x) << 3)
-
/*
- * Access the R4030 DMA and I/O Controller
+ * Handling the VIA ISA host bridge.
*/
-#ifndef _LANGUAGE_ASSEMBLY
-
-static inline void r4030_delay(void)
-{
-__asm__ __volatile__(
- ".set\tnoreorder\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- ".set\treorder");
-}
-
-static inline unsigned short r4030_read_reg16(unsigned addr)
-{
- unsigned short ret = *((volatile unsigned short *)addr);
- r4030_delay();
- return ret;
-}
-
-static inline unsigned int r4030_read_reg32(unsigned addr)
-{
- unsigned int ret = *((volatile unsigned int *)addr);
- r4030_delay();
- return ret;
-}
-static inline void r4030_write_reg16(unsigned addr, unsigned val)
-{
- *((volatile unsigned short *)addr) = val;
- r4030_delay();
+#define VIA_DELAY() \
+{ \
+ unsigned char ctr; \
+ for (ctr=0;ctr<1;ctr++); \
}
-static inline void r4030_write_reg32(unsigned addr, unsigned val)
-{
- *((volatile unsigned int *)addr) = val;
- r4030_delay();
+#define VIA_PORT_WRITE(x,y) \
+{ \
+ *((volatile unsigned char *) (0xb0000000 | x)) = y; \
+ VIA_DELAY(); \
}
-#endif /* !_LANGUAGE_ASSEMBLY */
-
-/*
- * Handling the VIA ISA host bridge.
- */
+#define VIA_PORT_READ(x) (*((unsigned char *) (0xB0000000 | (x))))
#define RESET_VIA_TIMER() \
asm("sb\t%1,0x70(%0)\n\t" \
@@ -123,39 +88,6 @@
#define VIA_CMOS_ADDR 0x70
#define VIA_CMOS_DATA 0x71
-
-#define VIA_CMOS_CONSOLE_FLG 0x13 /* CMOS byte for console I/O */
-/*
- * By convention, the bootflag's low order bit is a valid indicator
- * and rest of the byte is serial console configuration information.
- *
- * This is NOT implemented in the rom code yet, it only tests for
- * 0x1 and 0xA5 as off or 1152. If you pick some other speed, the
- * kernel will "do the right thing", but the rom will ignore it.
- */
-
-#ifndef _LANGUAGE_ASSEMBLY /* { */
-
-union cobalt_cons_info {
- unsigned char ccons_char;
- struct {
- unsigned char
- valid:2, /* CMOS default is 11 */
- kout:1, /* kernel output enabled */
- res1:2, /* 2 bits reserved */
- baud:3; /* Default baud rate */
- } ccons_bits;
-};
-
-int cobalt_cons_koutok(void);
-int cobalt_cons_baudint(void);
-int cobalt_cons_baudbaud(void);
-#endif /* } _LANGUAGE_ASSEMBLY */
-
-#define VIA_CMOS_CONS_VALID 0x1
-#define VIA_CMOS_CONS_OFF 0
-#define VIA_CMOS_CONS_9600 0x2 /* ROM sees disable */
-#define VIA_CMOS_CONS_115K 0x5 /* max value 0x7 */
/*
* The Cobalt board id information. The boards have an ID number wired
|
