Update of /cvsroot/linux-mips/linux/drivers/net/tulip
In directory usw-pr-cvs1:/tmp/cvs-serv3535/drivers/net/tulip
Modified Files:
eeprom.c tulip_core.c
Log Message:
More OSS syncing..
Index: eeprom.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/tulip/eeprom.c,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -d -r1.3 -r1.4
--- eeprom.c 6 Nov 2001 20:23:55 -0000 1.3
+++ eeprom.c 21 Apr 2002 20:01:14 -0000 1.4
@@ -29,24 +29,6 @@
/* Known cards that have old-style EEPROMs. */
static struct eeprom_fixup eeprom_fixups[] __devinitdata = {
- // Super big hack... we don't have a registered MAC address yet. TJS
- // Add 100Mbps here too...
- {"Cobalt 27", 0, 0x10, 0xE0, {0x1e00, /* 0 == controller #, 1e ==
- offset */
- 0x0000, /* 0 == high offset, 0 == gap */
- 0x0800, /* Default Autoselect */
- 0x8001, /* 1 leaf, extended type, bogus len */
- 0x0003, /* Type 3 (MII), PHY #0 */
- 0x0400, /* 0 init instr, 4 reset instr */
- 0x0801, /* Set control mode, GP0 output */
- 0x0000, /* Drive GP0 Low (RST is active low) */
- 0x0800, /* control mode, GP0 input (undriven) */
- 0x0000, /* clear control mode */
- 0x7800, /* 100TX FDX + HDX, 10bT FDX + HDX */
- 0x01e0, /* Advertise all above */
- 0x5000, /* FDX all above */
- 0x1800, /* Set fast TTM in 100bt modes */
- 0x0, /* PHY cannot be unplugged */ }},
{"Asante", 0, 0, 0x94, {0x1e00, 0x0000, 0x0800, 0x0100, 0x018c,
0x0000, 0x0000, 0xe078, 0x0001, 0x0050, 0x0018 }},
{"SMC9332DST", 0, 0, 0xC0, { 0x1e00, 0x0000, 0x0800, 0x041f,
@@ -104,19 +86,6 @@
int i;
tp->mtable = 0;
-#if defined(__mips__)
- /*
- * Cobalt:
- * Our EEPROMs are specification challenged, so we check
- * to see if the current device is not in the PCI slot.
- * PCI cards fend for themselves, otherwise we kludge.
- */
- if (dev->base_addr != 0x10108000) { /* not PCI slot */
- ee_data[19] = 1; /* set One controller... TJS */
- i = 8; /* make us fall into the right code */
- }
- else
-#endif
/* Detect an old-style (SA only) EEPROM layout:
memcmp(eedata, eedata+16, 8). */
for (i = 0; i < 8; i ++)
Index: tulip_core.c
===================================================================
RCS file: /cvsroot/linux-mips/linux/drivers/net/tulip/tulip_core.c,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -d -r1.14 -r1.15
--- tulip_core.c 15 Jan 2002 18:01:26 -0000 1.14
+++ tulip_core.c 21 Apr 2002 20:01:15 -0000 1.15
@@ -209,6 +209,7 @@
{ 0x1317, 0x1985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
{ 0x13D1, 0xAB02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
{ 0x13D1, 0xAB03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
+ { 0x13D1, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
{ 0x104A, 0x0981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
{ 0x104A, 0x2774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
{ 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
@@ -250,9 +251,8 @@
static struct net_device_stats *tulip_get_stats(struct net_device *dev);
static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
static void set_rx_mode(struct net_device *dev);
-#ifdef CONFIG_COBALT_27
-static int tulip_linkcheck(void *cookie);
-#endif
+
+
static void tulip_set_power_state (struct tulip_private *tp,
int sleep, int snooze)
@@ -705,32 +705,6 @@
tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma);
}
-#ifdef CONFIG_COBALT_27
-static int tulip_linkcheck(void *cookie)
-{
- struct net_device *dev = cookie;
- struct tulip_private *tp = (struct tulip_private *)dev->priv;
- int ioaddr = dev->base_addr;
- unsigned int link_status;
-
- /*
- * If we have a MII, check the PHY
- */
- if (tp->mtable && tp->mtable->has_mii == 1) {
- link_status = tulip_mdio_read(dev, 1, 1);
- return (link_status & (1 << 2)) != 0;
- }
-
- /*
- * Check the chip 10 and 100 Mbit/s link
- * (not obvious how 100 Mbit can blink if there is no MII)
- */
- link_status = inl(ioaddr + CSR12);
-
- return (link_status & 6) != 0;
-}
-#endif /* CONFIG_COBALT_27 */
-
static int
tulip_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
@@ -738,8 +712,9 @@
int entry;
u32 flag;
dma_addr_t mapping;
+ unsigned long eflags;
- spin_lock_irq(&tp->lock);
+ spin_lock_irqsave(&tp->lock, eflags);
/* Calculate the next Tx descriptor entry. */
entry = tp->cur_tx % TX_RING_SIZE;
@@ -777,7 +752,7 @@
/* Trigger an immediate transmit demand. */
outl(0, dev->base_addr + CSR1);
- spin_unlock_irq(&tp->lock);
+ spin_unlock_irqrestore(&tp->lock, eflags);
dev->trans_start = jiffies;
@@ -1368,7 +1343,6 @@
tp->csr0 = csr0;
goto out;
-early_out:
if (csr0 & MWI) {
pci_command &= ~PCI_COMMAND_INVALIDATE;
pci_write_config_word(pdev, PCI_COMMAND, pci_command);
@@ -1442,9 +1416,6 @@
* without the workarounds being on.
*/
-#ifdef CONFIG_COBALT_27
- force_csr0 = 1;
-#endif
/* Intel Saturn. Switch to 8 long words burst, 8 long word cache aligned
Aries might need this too. The Saturn errata are not pretty reading but
thankfully its an old 486 chipset.
@@ -1658,6 +1629,16 @@
tp->flags &= ~HAS_MEDIA_TABLE;
}
#endif
+#ifdef CONFIG_MIPS_COBALT
+ if ((pdev->bus->number == 0) &&
+ ((PCI_SLOT(pdev->devfn) == 7) ||
+ (PCI_SLOT(pdev->devfn) == 12))) {
+ /* Cobalt MAC address in first EEPROM locations. */
+ sa_offset = 0;
+ /* No media table either */
+ tp->flags &= ~HAS_MEDIA_TABLE;
+ }
+#endif
for (i = 0; i < 6; i ++) {
dev->dev_addr[i] = ee_data[i + sa_offset];
sum += ee_data[i + sa_offset];
@@ -1792,9 +1773,6 @@
else if (tp->flags & HAS_PNICNWAY)
tp->link_change = pnic_lnk_change;
-#ifdef CONFIG_COBALT_27
- lcd_register_linkcheck_func(dev->name[3] - '0', tulip_linkcheck, dev);
-#endif
/* Reset the xcvr interface and turn on heartbeat. */
switch (chip_idx) {
case DC21041:
@@ -1948,7 +1926,7 @@
name: DRV_NAME,
id_table: tulip_pci_tbl,
probe: tulip_init_one,
- remove: tulip_remove_one,
+ remove: __devexit_p(tulip_remove_one),
#ifdef CONFIG_PM
suspend: tulip_suspend,
resume: tulip_resume,
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